Specifications
AHB Monitor
4-10 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
4.2.2 Profiling Counters
The Profiling Counters provide information about bus activity over a much longer time
span than the AHBMONITOR[32:29] port. Each counter is 32 bits wide and records
the number of occurrences of a particular event, since a software or hardware reset. The
count values can be read back through the AHB slave interface. Control registers can be
written to the AHB interface to enable, disable, reset the counters, and in some cases,
modify the manner in which they count. The counters are used for statistical profiling
of software and system setups, for example the number of cache line fills and/or
evictions during a particular algorithm. This permits some assessment of how well the
bus fabric is managing competition for slave bandwidth.
As each monitor layer registers the target bus signals to minimize the loading effects,
the control and configuration of the counters is required to be synchronized to match the
pipelined effect. This ensures that the activity monitored coincides with the correct
configuration settings. The best example to explain this synchronization is the write to
reset the counters; the write that caused the reset does not cause the respective profile
counters to increment, but any transfers directly after do.
Table 4-5 Bit patterns for GXI state for address channel
Symbol Name
Encoding
[30:29]
Description
I Idle 00 The GXI address channel is idle, that is, no transfers are
active nor pending
W Wait 01 The GXI address channel is waiting on a read or write
address transfer
Rd Read 10 The GXI address channel is completing a read address
transfer
Wr Write 11 The GXI address channel is completing a write transfer