Specifications

AHB Monitor

4.1 About the AHB monitor

The ARM926EJ-S Development Chip contains a multi-layer AHB system to provide

high bandwidth connectivity between the various bus masters and slaves both within

and outside the ARM926EJ-S Development Chip. The AHB Monitor connects to the

AHB matrix. A slave bus is available for reading bus activity counters.

The release version for the AHB Monitor is SP816. The base address for the AHB

registers is

0x101D000

For further information on AMBA refer to the AMBA Specification.

The AHB Monitor block provides two functions:

• suppling an off-chip, real-time monitor on the state of the six AHB buses and

MBX graphics expansion interface within the ARM926EJ-S Development Chip

• recording operational data to enable a profiling analysis of the interconnect

system.

The AHB Monitor contains an AHB slave interface to enable the control and retrieval

of the monitor data located between

0x101D0000

and

0x101DFFFF

on the ARM Data and

expansion AHB Layers

The AHB Monitor contains the following blocks that supply the functional elements:

• ARM-D Layer Monitor

• ARM-I Layer Monitor

• CLCDC Layer Monitor

• DMA-0 Layer Monitor

• DMA-1 Layer Monitor

• EXPansion Layer Monitor

• MBX Graphics eXpansion Interface (GXI) Monitor

• AHB Slave Interface.

The AHB layer monitors observe the activity on their respective bus signals to produce

real-time information, that is exported off-chip, and record statistical information, that

is accessible through the AHB slave interface.

The GXI is a dedicated interconnect between the MBX and MPMC. The MBX GXI

monitor observes the activity on this interconnect and records statistical information in

a similar manner that of the AHB layer monitors.