Specifications

List of Tables
ARM DDI 0287B Copyright © 2004, 2006 ARM Limited. All rights reserved. xi
Table 8-1 DMA request and response signal descriptions ........................................................ 8-7
Table 9-1 On-chip signal descriptions ....................................................................................... 9-4
Table 9-2 Pad signal descriptions ............................................................................................. 9-5
Table 10-1 Pad interface and control signal descriptions .......................................................... 10-8
Table 12-1 Interrupts ................................................................................................................. 12-5
Table 12-2 SCI signals .............................................................................................................. 12-6
Table 13-1 Internal signal descriptions ...................................................................................... 13-8
Table 13-2 Pad signals .............................................................................................................. 13-9
Table 14-1 Pad signal descriptions ........................................................................................... 14-6
Table 16-1 Pad signal descriptions ........................................................................................... 16-8
Table 17-1 Tied off or unused signals ..................................................................................... 17-10
Table 17-2 Interrupt controller pad signals .............................................................................. 17-11
Table 18-1 Access to control registers ...................................................................................... 18-5
Table A-1 Pad signals ................................................................................................................ A-2
Table B-1 Interface signal electrical characteristics ................................................................... B-3
Table B-2 Operating ranges ...................................................................................................... B-3
Table B-3 Power estimate ......................................................................................................... B-4
Table C-1 ARM926EJ-S Development Chip bus timing ........................................................... C-3
Table C-2 ARM926EJ-S Development Chip memory timing .................................................... C-4
Table C-3 Peripherals and controller timing .............................................................................. C-5