Specifications

Memory Map and Memory Configuration

HRESPM1[1:0] Input The transfer response provides additional information on the status of a

transfer. Two different responses are provided, OKAY and ERROR.

HDATAM1[31:0] Bidirectional Read/write data bus.

HCLKM1 Input Asynchronous AHB bus clock from an external source.

Table 3-2 AHB M2 signals

Signal Name Type Description

HBUSREQM2 Output Bus request. A signal from the master to the arbiter, which indicates that the

master interface requires the bus.

HLOCKM2 Output When HIGH this signal indicates that the master requires locked access to

the bus and no other master should be granted the bus until this signal is

LOW.

HGRANTM2 Input Bus grant. This signal indicates that the master interface is currently the

highest priority master. Ownership of the address / control signals changes at

the end of a transfer when HREADYM is HIGH, so the master gets access to

the bus when both HREADYM and HGRANTM are HIGH.

HADDRM2[31:0] Tristate output System address bus, least significant 20 bits, driven by the active bus master.

HWRITEM2 Tristate output Transfer direction signal. When HIGH, this signal indicates a write to a slave

and when LOW a read from a slave.

HTRANSM2[1:0] Tristate output Indicates the type of the current transfer, which can be NONSEQUENTIAL,

SEQUENTIAL, IDLE or BUSY.

HSIZEM2[1:0] Tristate output Transfer size signal. This signal indicates the size of the current transfer,

which can be byte (8-bit), halfword (16-bit), or word (32-bit).

HBURSTM2[2:0] Tristate output Indicates if the transfer forms part of a burst. Four, eight and 16 beat bursts

are supported and the burst can be either incrementing or wrapping.

HPROTM2[3:0] Tristate output The protection control signals provide additional information about a bus

access. They are primarily intended for use by any module that wished to

implement some level of protection.

HREADYM2 Input Transfer completed input. When HIGH the signal indicates that a transfer has

finished on the bus. This signal can be driven LOW to extend a transfer.

Table 3-1 AHB M1 signals (continued)

Signal Name Type Description