Specifications

Memory Map and Memory Configuration
ARM DDI 0287B Copyright © 2004, 2006 ARM Limited. All rights reserved. 3-27
Figure 3-15 Alias for REMAPSTATIC HIGH and MPMCnSMC LOW
Figure 3-16 shows the internal bus map for:
• REMAPSTATIC HIGH
• MPMCnSMC HIGH (the MPMC controls static memory)
• CFGBRIDGEMEMMAP HIGH (AHB M1 determined by address range)
• REMAPEXTERNAL LOW (boot memory is controlled by MPMC).
Figure 3-16 Alias for REMAPSTATIC HIGH and MPMCnSMC HIGH
0x00000000
0x10000000
AHB Bridge 2
to
Off-chip
Peripherals
ARM D AHB
AHB Bridge 2
to
Off-chip
Peripherals
Expansion
AHB S
SSMC
nSTATICCS1
0x0FFFFFFF
MPMC
MPMCDYCS1
ARM I, CLCD &
DMA1 AHB
DMA0 AHB
MPMC
MPMCDYCS0
AHB Bridge 2
to
Off-chip
Peripherals
SSMC
nSTATICCS1
MPMC
MPMCDYCS1
MPMC
MPMCDYCS0
AHB Bridge 2
to
Off-chip
Peripherals
SSMC
nSTATICCS1
MPMC
MPMCDYCS1
MPMC
MPMCDYCS0
0x00000000
0x10000000
AHB Bridge 2
to
Off-chip
Peripherals
0x0FFFFFFF
ARM D AHB
ARM I, CLCD &
DMA1 AHB
DMA0 AHB
AHB Bridge 2
to
Off-chip
Peripherals
Expansion
AHB S
MPMC
nSTATICCS1
MPMC
MPMCDYCS1
MPMC
MPMCDYCS0
AHB Bridge 2
to
Off-chip
Peripherals
MPMC
nSTATICCS1
MPMC
MPMCDYCS1
MPMC
MPMCDYCS0
AHB Bridge 2
to
Off-chip
Peripherals
MPMC
nSTATICCS1
MPMC
MPMCDYCS1
MPMC
MPMCDYCS0