Specifications

Memory Map and Memory Configuration
3-26 Copyright © 2004, 2006 ARM Limited. All rights reserved. ARM DDI 0287B
Figure 3-14 shows the internal bus map for:
• REMAPSTATIC LOW (only dynamic memory in boot area)
• MPMCnSMC X
• CFGBRIDGEMEMMAP HIGH (AHB M1 determined by address range)
• REMAPEXTERNAL LOW (boot memory is controlled by MPMC ).
Figure 3-14 Alias for REMAPSTATIC LOW
Figure 3-15 on page 3-27 shows the internal bus map for:
• REMAPSTATIC HIGH
• MPMCnSMC LOW (the SSMC controls static memory)
• CFGBRIDGEMEMMAP HIGH (AHB M1 determined by address range)
• REMAPEXTERNAL LOW (boot memory is controlled by MPMC and SSMC).
0x00000000
0x10000000
AHB Bridge 2
to
Off-chip
Peripherals
AHB Bridge
2 to
Off-chip
Peripherals
ARM D AHB
AHB Bridge 2
to
Off-chip
Peripherals
Expansion
AHB S
0x0FFFFFFF
ARM I, CLCD &
DMA1 AHB
DMA0 AHB
AHB Bridge 2
to
Off-chip
Peripherals
MPMC
MPMCDYCS0
MPMC
MPMCDYCS0
MPMC
MPMCDYCS0
MPMC
MPMCDYCS1
MPMC
MPMCDYCS1
MPMC
MPMCDYCS1