Product data

LPC3130_3131 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 29 May 2012 44 of 67
NXP Semiconductors
LPC3130/3131
Low-cost, low-power ARM926EJ-S microcontrollers
[1] 12 MHz oscillator running; PLLs off; SYS_BASE and AHB_APB0_BASE Base domain clocks are enabled, driven by 12 MHz oscillator;
all peripherals off; SUP4 buffers set to input w/PD; SUP8 and SUP3 buffers set to input w/repeater. Shutting off the 12 MHz osc will
reduce power to 1.4 mW (requires a RSTIN_N to run again).
[2] Running Linux with 100% load; all peripherals on; instruction and data caches on; MMU on.
[3] Dynamic clock scaling active; hardware will automatically switch the SYSBASE clocks to a slow clock (180 / 64 = 2.81 MHz) during
times of bus inactivity. ARM926 and NAND flash clocks are not scaled for this test.
[4] Running Linux idle at prompt; all peripherals on; instruction and data caches on; MMU on.
[5] Running Dhrystone test (600 k/sec); UART and timers enabled; instruction and data caches on; MMU on.
[6] Running Dhrystone test (121.83 k/sec); UART and timers enabled; instruction and data caches off; MMU off.
Internal SRAM based system (operating frequency 180 MHz (core)/ 90 MHz (bus)); normal mode power; without
dynamic clock scaling; MMU off
[6]
I
DD
Supply current core; VDDI = 1.2 V - 26.3 - mA
all other SUP1 supplies: VDDA12 = 1.2 V;
USB_VDDA12_PL = 1.2 V
-1.57-mA
VDDE_IOA = 1.8 V - 1 - mA
VDDE_IOB = 1.8 V - 0.038 - mA
VDDE_IOC = 3.3 V - 0.068 - mA
ADC10B_VDDA33 = 3.3 V - 0.0002 - mA
USB_VDDA33 = 3.3 V - 1.59 - mA
USB_VDDA_DRV = 3.3 V - 0.89 - mA
P Power dissipation Total for supply domains SUP1, SUP3, SUP4,
SUP8
- 43.7 - mW
Table 14. Power consumption
…continued
Symbol Parameter Conditions Min Typ Max Unit