Datasheet

Contents
ARM7TDMI Data Sheet
ARM DDI 0029E
Contents-ii
Open Access
4 ARM Instruction Set 4-1
4.1 Instruction Set Summary 4-2
4.2 The Condition Field 4-5
4.3 Branch and Exchange (BX) 4-6
4.4 Branch and Branch with Link (B, BL) 4-8
4.5 Data Processing 4-10
4.6 PSR Transfer (MRS, MSR) 4-18
4.7 Multiply and Multiply-Accumulate (MUL, MLA) 4-23
4.8 Multiply Long and Multiply-Accumulate Long (MULL,MLAL) 4-25
4.9 Single Data Transfer (LDR, STR) 4-28
4.10 Halfword and Signed Data Transfer 4-34
4.11 Block Data Transfer (LDM, STM) 4-40
4.12 Single Data Swap (SWP) 4-47
4.13 Software Interrupt (SWI) 4-49
4.14 Coprocessor Data Operations (CDP) 4-51
4.15 Coprocessor Data Transfers (LDC, STC) 4-53
4.16 Coprocessor Register Transfers (MRC, MCR) 4-57
4.17 Undefined Instruction 4-60
4.18 Instruction Set Examples 4-61
5 THUMB Instruction Set 5-1
5.1 Format 1: move shifted register 5-5
5.2 Format 2: add/subtract 5-7
5.3 Format 3: move/compare/add/subtract immediate 5-9
5.4 Format 4: ALU operations 5-11
5.5 Format 5: Hi register operations/branch exchange 5-13
5.6 Format 6: PC-relative load 5-16
5.7 Format 7: load/store with register offset 5-18
5.8 Format 8: load/store sign-extended byte/halfword 5-20
5.9 Format 9: load/store with immediate offset 5-22
5.10 Format 10: load/store halfword 5-24
5.11 Format 11: SP-relative load/store 5-26
5.12 Format 12: load address 5-28
5.13 Format 13: add offset to Stack Pointer 5-30
5.14 Format 14: push/pop registers 5-32
5.15 Format 15: multiple load/store 5-34
5.16 Format 16: conditional branch 5-36
5.17 Format 17: software interrupt 5-38