Datasheet

Introduction
ARM7TDMI Data Sheet
ARM DDI 0029E
1-5
Open Access
1.4 ARM7TDMI Core Diagram
Figure 1-2: ARM7TDMI core
nRESET
nMREQ
SEQ
ABORT
nIRQ
nFIQ
nRW
LOCK
nCPI
CPA
CPB
nWAIT
MCLK
nOPC
nTRANS
Instruction
Decoder
&
Control
Logic
Instruction Pipeline
& Read Data Register
DBE
D[31:0]
32-bit ALU
Barrel
Shifter
Address
Incrementer
Address Register
Register Bank
(31 x 32-bit registers)
(6 status registers)
A[31:0]
ALE
Multiplier
ABE
Write Data Register
nM[4:0]
32 x 8
nENOUT
nENIN
TBE
Scan
Control
BREAKPTI
DBGRQI
nEXEC
DBGACK
ECLK
ISYNC
B
b
u
s
A
L
U
b
u
s
A
b
u
s
P
C
b
u
s
I
n
c
r
e
m
e
n
t
e
r
b
u
s
APE
BL[3:0]
MAS[1:0]
TBIT
HIGHZ
& Thumb Instruction Decoder