Datasheet
Introduction
ARM7TDMI Data Sheet
ARM DDI 0029E
1-3
Open Access
1.2.2 THUMB’s Advantages
THUMB instructions operate with the standard ARM register configuration, allowing
excellent interoperability between ARM and THUMB states. Each 16-bit THUMB
instruction has a corresponding 32-bit ARM instruction with the same effect on the
processor model.
The major advantage of a 32-bit (ARM) architecture over a 16-bit architecture is its
ability to manipulate 32-bit integers with single instructions, and to address a large
address space efficiently. When processing 32-bit data, a 16-bit architecture will take
at least two instructions to perform the same task as a single ARM instruction.
However, not all the code in a program will process 32-bit data (for example, code that
performs character string handling), and some instructions, like Branches, do not
process any data at all.
If a 16-bit architecture only has 16-bit instructions, and a 32-bit architecture only has
32-bit instructions, then overall the 16-bit architecture will have better code density,
and better than one half the performance of the 32-bit architecture. Clearly 32-bit
performance comes at the cost of code density.
THUMB breaks this constraint by implementing a 16-bit instruction length on a 32-bit
architecture, making the processing of 32-bit data efficient with a compact instruction
coding. This provides far better performance than a 16-bit architecture, with better
code density than a 32-bit architecture.
THUMB also has a major advantage over other 32-bit architectures with 16-bit
instructions. This is the ability to switch back to full ARM code and execute at full
speed. Thus critical loops for applications such as
• fast interrupts
• DSP algorithms
can be coded using the full ARM instruction set, and linked with THUMB code. The
overhead of switching from THUMB code to ARM code is folded into sub-routine entry
time. Various portions of a system can be optimised for speed or for code density by
switching between THUMB and ARM execution as appropriate.