Schematics

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B B
A A
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10 10
HD Connectors
SL-ABX00046
4.0
9/30/2021 3:56:55 PM
Title:
ID:
Date:
Revision:
Sheet ofTime:
Arturo GuadalupiAuthor: RevAuthor: Dario PennisiHDConn.SchDocFile:
ETH_A_P
1
DSI_D3_P
2
ETH_A_N
3
DSI_D3_N
4
ETH_B_P
5
DSI_D2_P
6
ETH_B_N
7
DSI_D2_N
8
ETH_C_P
9
DSI_D1_P
10
ETH_C_N
11
DSI_D1_N
12
ETH_D_P
13
DSI_D0_P
14
ETH_D_N
15
DSI_D0_N
16
ETH_LED1
17
DSI_CK_P
18
ETH_LED2
19
DSI_CK_N
20
VIN
21
GND
22
USB1_VBUS
23
USB0_VBUS
24
USB1_D_P
25
USB0_D_P
26
USB1_D_N
27
USB0_D_N
28
USB1_ID
29
USB0_ID
30
GND
31
VIN
32
SERIAL1_TX
33
SERIAL0_TX
34
SERIAL1_RX
35
SERIAL0_RX
36
SERIAL1_RTS
37
SERIAL0_RTS
38
SERIAL1_CTS
39
SERIAL0_CTS
40
VIN
41
GND
42
I2C1_SDA
43
I2C0_SDA
44
I2C1_SCL
45
I2C0_SCL
46
GND
47
VIN
48
CAN1_TX
49
CAN0_TX
50
CAN1_RX
51
CAN0_RX
52
VSYS
53
GND
54
SDC_CLK
55
I2S_CK
56
SDC_CMD
57
I2S_WS
58
SDC_D0
59
I2S_SDI
60
SDC_D1
61
SDC_D2
63
SDC_D3
65
SDC_CD
67
SDC_WP
69
SDC_RST
71
JTAG_RESET
73
JTAG_TMS/SWD
75
JTAG_TCK/SCK
77
JTAG_TDO/SWO
79
I2S_SDO
62
VSYS
64
PDM_CK
66
PDM_D0
68
PDM_D1
70
VCC
72
SPDIF_TX
74
SPDIF_RX
76
JTAG_TDI
78
JTAG_TRST
80
J1
DF40C-80DP-0.4V(51)-LEFT
BOOT
1
CAM_D7_D3_P
2
BT_SEL
3
CAM_D6_D3_N
4
PWRON
5
CAM_D5_D2_P
6
LICELL
7
CAM_D4_D2_N
8
PCIE_TX_P
9
CAM_D3_D1_P
10
PCIE_TX_N
11
CAM_D2_D1_N
12
PCIE_RX_P
13
CAM_D1_D0_P
14
PCIE_RX_N
15
CAM_D0_D0_N
16
PCIE_CK_P
17
CAM_VS_CK_P
18
PCIE_CK_N
19
CAM_CK_CK_N
20
PCIE_RST
21
CAM_HS
22
VCC
23
GND
24
SERIAL3_TX
25
SERIAL2_TX
26
SERIAL3_RX
27
SERIAL2_RX
28
SERIAL3_RTS
29
SERIAL2_RTS
30
SERIAL3_CTS
31
SERIAL2_CTS
32
GND
33
VCC
34
SPI0_CS
35
SPI1_CS
36
SPI0_CK
37
SPI1_CK
38
SPI0_MISO
39
SPI1_MISO
40
SPI0_MOSI
41
SPI1_MOSI
42
VCC
43
GND
44
I2C2_SDA
45
GPIO_0
46
I2C2_SCL
47
GPIO_1
48
SAI_CK
49
GPIO_2
50
SAI_FS
51
GPIO_3
52
SAI_D0
53
GPIO_4
54
SAI_D1
55
GPIO_5
56
GND
57
GPIO_6
58
PWM_0
59
PWM_5
60
PWM_1
61
PWM_2
63
PWM_3
65
PWM_4
67
VCC
69
ANALOG_VREF_P
71
ANALOG_A0
73
ANALOG_A1
75
ANALOG_A2
77
ANALOG_A3
79
PWM_6
62
PWM_7
64
PWM_8
66
PWM_9
68
GND
70
ANALOG_VREF_N
72
ANALOG_A4
74
ANALOG_A5
76
ANALOG_A6
78
ANALOG_A7
80
J2
DF40C-80DP-0.4V(51)-RIGHT
PWRON
BOOT
BT_SEL
VREF_P
A0
A1
A2
A3
A7
A6
A5
A4
VREF_N
ANALOG
0
1
2
3
4
5
6
7
8
9
PWM
VBUS
D_P
D_N
ID
USB
LPUART RX
TX
RTS
CTS
UART
SCL
SDA
I2C
RX
TXCAN
CAN
CLK
CMD
D0
D1
D2
D3
CD
WP
RST
SDC
SDC2
RESET
TCK/SCK
TDI
TDO/SWO
TMS/SWD
TRST
JTAG
CLK_N
CLK_P
D0_N
D0_P
D1_N
D1_P
D2_N
D2_P
D3_N
D3_P
DISPLAY
VBUS
D_P
D_N
ID
USB
RX
TX
RTS
CTS
UART
SDA
SCL
I2C
I2C3
CK
SDI
SDO
WS
I2S
I2S2
CK
D0
D1
PDM
RX
TX
RTS
CTS
UART
SDA
SCL
I2C
CK
FS
D0
D1
SAI
D7_D3_P
D6_D3_N
D5_D2_P
D4_D2_N
D3_D1_P
D2_D1_N
D1_D0_P
D0_D0_N
VS_CK_P
CK_CK_N
HS
CAMERA
RX
TX
RTS
CTS
UART
CS
CK
MISO
MOSI
SPI
SAI2A
UART8
UART6
ANALOG
JTAG
USB_HS
I2C1
ETH
USB_FS
DSI
PDM
UART4
PWM
I2C4
CAM
SPI2
SHARED
PINS
SHARED
PINS
SHARED PINS TABLE
BUS 1
JTAG
JTAG.TDO/SWO SDC2
CAM.D3_D1_P
I2C4
CAM
CAM.D2_D1_N
I2C4
CAM
ADC.A7
ANALOG
CAM
ADC.A6
ANALOG
CAM
ADC.A5
ADC.A4
ANALOG
ANALOG
SPI2
SPI2
SAI2A
SAI2A
SAI2A
CAM
CAM
CAM
CAM.D6_D3_N
CAM.VS_CK_P
CAM.D7_D3_P
SHARED
PINS
SHARED
PINS
SHARED
PINS
SHARED
PINS
BUS 2
NET
J1 J2
USB
J1 J2
USB
Board side view:
Board BOTTOM view:
1
180
80
VSYS
VIN
VIN
USB_HS.ID
DSI.CLK_P
DSI.CLK_N
DSI.D0_P
DSI.D0_N
DSI.D1_P
DSI.D1_N
UART4.RTS
UART4.CTS
PDM.CK
PDM.D0
JTAG.RESET
JTAG.TMS/SWD
JTAG.TCK/SCK
JTAG.TDO/SWO
SDC2.CLK
SDC2.CMD
SDC2.D0
SDC2.D1
JTAG.TDO/SWO
SDC2.D3
I2C1.SDA
I2C1.SCL
LPUART.RTS
LPUART.CTS
LPUART.TX
LPUART.RX
VIN
I2C3.SDA
I2C3.SCL
I2S2.CK
I2S2.WS
I2S2.SDI
I2S2.SDO
VSYS
+3V3
VIN
USB_HS.D_N
USB_HS.D_P
ETH.A_P
ETH.A_N
ETH.B_P
ETH.B_N
USB_FS.D_P
+3V3
+3V3
+3V3
+3V3
ADC.A4
SPI2.CK
SPI2.CS
ADC.A5
GPIO.0
GPIO.1
GPIO.2
GPIO.3
GPIO.4
GPIO.5
GPIO.6
CAM.D3_D1_P
CAM.D2_D1_N
ADC.A7
ADC.A6
CAM.VS_CK_P
CAM.D0_D0_N
CAM.D1_D0_P
CAM.D2_D1_N
CAM.D3_D1_P
CAM.D4_D2_N
CAM.D5_D2_P
CAM.D6_D3_N
CAM.D7_D3_P
UART6.TX
UART6.RX
PWM.5
PWM.6
PWM.7
PWM.8
PWM.9
ADC.A0
ADC.A1
ADC.A2
ADC.A3
ADC.A7
ADC.A6
ADC.A5
ADC.A4
PWM.0
PWM.1
PWM.2
PWM.3
PWM.4
PWM.5
PWM.6
PWM.7
PWM.8
PWM.9
UART8.RX
UART8.TX
IF NECESSARY ROUTE CAMERA
WITH DIFFERENTIAL PAIR RULES
CHANGING THE NET NAMES.
REFER TO SHARED PINS TABLE
= PA12
= PA11
USB_FS.D_N
CAM.D6_D3_N
CAM.VS_CK_P
CAM.D7_D3_P
LICELL
POWER NETS TABLE
TYPENET
VCC
+3V3
VSYS
VSYS
VIN
VIN
PORTENTA INPUT
PORTENTA OUTPUT
PORTENTA RESERVED
OUTPUT
RANGES DESCRIPTION
4.1V to 6V.
1.1V to 3.3V in steps, max 1A.
Default 3.3V, PMIC (U10) programmable output.
RESERVED, DO NOT USE
Default 4.2V, PMIC (U10) programmable output which is also
the input voltage of the bucks inside the PMIC itself.
Default 3.3V, PMIC (U10) programmable output.
LICELL
LICELL
PORTENTA INPUT
Coinc cell max 3.6V, max 46uA.
Max 4uA with PMIC (U10) in coin cell mode, max 46uA with
PMIC in standby/suspend mode.
3.5V to 4.2V, max 600mA.
UART4.TX
UART4.RX
CAN.RX
CAN.TX
A_N
A_P
B_N
B_P
C_N
C_P
D_N
D_P
LED1
LED2
ETH
0
1
2
3
4
5
6
GPIO
GPIO
PIJ101 PIJ102
PIJ103 PIJ104
PIJ105 PIJ106
PIJ107 PIJ108
PIJ109 PIJ1010
PIJ1011 PIJ1012
PIJ1013 PIJ1014
PIJ1015 PIJ1016
PIJ1017 PIJ1018
PIJ1019 PIJ1020
PIJ1021 PIJ1022
PIJ1023 PIJ1024
PIJ1025 PIJ1026
PIJ1027 PIJ1028
PIJ1029 PIJ1030
PIJ1031 PIJ1032
PIJ1033 PIJ1034
PIJ1035 PIJ1036
PIJ1037 PIJ1038
PIJ1039 PIJ1040
PIJ1041 PIJ1042
PIJ1043 PIJ1044
PIJ1045 PIJ1046
PIJ1047 PIJ1048
PIJ1049 PIJ1050
PIJ1051 PIJ1052
PIJ1053 PIJ1054
PIJ1055 PIJ1056
PIJ1057 PIJ1058
PIJ1059 PIJ1060
PIJ1061 PIJ1062
PIJ1063 PIJ1064
PIJ1065 PIJ1066
PIJ1067 PIJ1068
PIJ1069 PIJ1070
PIJ1071 PIJ1072
PIJ1073 PIJ1074
PIJ1075 PIJ1076
PIJ1077 PIJ1078
PIJ1079 PIJ1080
COJ1
PIJ201 PIJ202
PIJ203 PIJ204
PIJ205 PIJ206
PIJ207 PIJ208
PIJ209 PIJ2010
PIJ2011 PIJ2012
PIJ2013 PIJ2014
PIJ2015 PIJ2016
PIJ2017 PIJ2018
PIJ2019 PIJ2020
PIJ2021 PIJ2022
PIJ2023 PIJ2024
PIJ2025 PIJ2026
PIJ2027 PIJ2028
PIJ2029 PIJ2030
PIJ2031 PIJ2032
PIJ2033 PIJ2034
PIJ2035 PIJ2036
PIJ2037 PIJ2038
PIJ2039 PIJ2040
PIJ2041 PIJ2042
PIJ2043 PIJ2044
PIJ2045 PIJ2046
PIJ2047 PIJ2048
PIJ2049 PIJ2050
PIJ2051 PIJ2052
PIJ2053 PIJ2054
PIJ2055 PIJ2056
PIJ2057 PIJ2058
PIJ2059 PIJ2060
PIJ2061 PIJ2062
PIJ2063 PIJ2064
PIJ2065 PIJ2066
PIJ2067 PIJ2068
PIJ2069 PIJ2070
PIJ2071 PIJ2072
PIJ2073 PIJ2074
PIJ2075 PIJ2076
PIJ2077 PIJ2078
PIJ2079 PIJ2080
COJ2
POANALOG POANALOG0A0 POANALOG0A1 POANALOG0A2 POANALOG0A3 POANALOG0A4 POANALOG0A5 POANALOG0A6 POANALOG0A7 POANALOG0VREF0N POANALOG0VREF0P
POBOOT
POBT0SEL
POCAM POCAM0CK0CK0N POCAM0D00D00N POCAM0D10D00P POCAM0D20D10N POCAM0D30D10P POCAM0D40D20N POCAM0D50D20P POCAM0D60D30N POCAM0D70D30P POCAM0HS POCAM0VS0CK0P
POCAN POCAN0RX POCAN0TX
PODSI PODSI0CLK0N PODSI0CLK0P PODSI0D00N PODSI0D00P PODSI0D10N PODSI0D10P PODSI0D20N PODSI0D20P PODSI0D30N PODSI0D30P
POETH POETH0A0N POETH0A0P POETH0B0N POETH0B0P POETH0C0N POETH0C0P POETH0D0N POETH0D0P POETH0LED1 POETH0LED2
POGPIO POGPIO00 POGPIO01 POGPIO02 POGPIO03 POGPIO04 POGPIO05 POGPIO06
POI2C1 POI2C10SCL POI2C10SDA
POI2C3 POI2C30SCL POI2C30SDA POI2C4 POI2C40SCL POI2C40SDA
POI2S2 POI2S20CK POI2S20SDI POI2S20SDO POI2S20WS
POJTAG POJTAG0R\E\S\E\T\ POJTAG0TCK0SCK POJTAG0TDI POJTAG0TDO0SWO POJTAG0TMS0SWD POJTAG0TRST
POLICELL
POLPUART POLPUART0CTS POLPUART0RTS POLPUART0RX POLPUART0TX
POPDM POPDM0CK POPDM0D0 POPDM0D1
POPWM POPWM00 POPWM01 POPWM02 POPWM03 POPWM04 POPWM05 POPWM06 POPWM07 POPWM08 POPWM09
POPWRON
POSAI2A POSAI2A0CK POSAI2A0D0 POSAI2A0D1 POSAI2A0FS
POSDC2 POSDC20CD POSDC20CLK POSDC20CMD POSDC20D0 POSDC20D1 POSDC20D2 POSDC20D3 POSDC20RST POSDC20WP
POSPI2 POSPI20CK POSPI20CS POSPI20MISO POSPI20MOSI
POUART4 POUART40CTS POUART40RTS POUART40RX POUART40TX
POUART6 POUART60CTS POUART60RTS POUART60RX POUART60TX
POUART8 POUART80CTS POUART80RTS POUART80RX POUART80TX POUSB0FS POUSB0FS0D0N POUSB0FS0D0P POUSB0FS0ID POUSB0FS0VBUS POUSB0HS POUSB0HS0D0N POUSB0HS0D0P POUSB0HS0ID POUSB0HS0VBUS
POVCC
POVIN
POVSYS