Data Sheet

Table Of Contents
1. Block Diagram
I
N
/
O
U
T
D
A
T
A
B
U
S
Clock Generation
BUS Matrix
CPU
USARTn
SPIn
TWIn
CCL
ACn
ADCn
TCAn
TCBn
WOn
RXD
TXD
XCK
XDIR
MISO
MOSI
SCK
SS
SDA (master)
SCL (master)
PORTS
EVSYS
System
Management
SLPCTRL
RSTCTRL
CLKCTRL
E
V
E
N
T
R
O
U
T
I
N
G
N
E
T
W
O
R
K
D
A
T
A
B
U
S
UPDI
CRC
SRAM
NVMCTRL
Flash
EEPROM
OSC20M
OSC32K
XOSC32K
References
BOD/
VLM
POR
Bandgap
WDT
RTC
CPUINT
M M
S
M
S
S
OCD
UPDI
RST
TOSC2
TOSC1
S
EXTCLK
LUTn-OUT
WO
CLKOUT
PAn
PBn
PCn
PDn
PEn
PFn
RESET
SDA (slave)
SCL (slave)
GPIOR
AINPn
AINNn
OUT
AINn
EVOUTx
VREFA
LUTn-INn
Detectors/
ATmega809/1609/3209/4809 – 48-pin
Block Diagram
© 2019 Microchip Technology Inc.
Datasheet Preliminary
DS40002016B-page 5