Data Sheet

...........continued
Symbol
(1)
Description Condition Min. Typ. Max. Unit
t
LOW
Low period of SCL
Clock
f
SCL
≤100 kHz 4.7 - - µs
f
SCL
≤400 kHz 1.3 - -
f
SCL
≤1 MHz 0.5 - -
t
HIGH
High period of SCL
Clock
f
SCL
≤100 kHz 4.0 - - µs
f
SCL
≤400 kHz 0.6 - -
f
SCL
≤1 MHz 0.26 - -
t
SU;STA
Setup time for a
repeated Start
condition
f
SCL
≤100 kHz 4.7 - - µs
f
SCL
≤400 kHz 0.6 - -
f
SCL
≤1 MHz 0.26 - -
t
HD;DAT
Data hold time f
SCL
≤100 kHz 0 - 3.45 µs
f
SCL
≤400 kHz 0 - 0.9
f
SCL
≤1 MHz 0 - 0.45
t
SU;DAT
Data setup time f
SCL
≤100 kHz 250 - - ns
f
SCL
≤400 kHz 100 - -
f
SCL
≤1 MHz 50 - -
t
SU;STO
Setup time for
Stop condition
f
SCL
≤100 kHz 4 - - µs
f
SCL
≤400 kHz 0.6 - -
f
SCL
≤1 MHz 0.26 - -
t
BUF
Bus free time
between a Stop
and Start condition
f
SCL
≤100 kHz 4.7 - - µs
f
SCL
≤400 kHz 1.3 - -
f
SCL
≤1 MHz 0.5 - -
Note:
1. These parameters are for design guidance only and are not production tested.
4.14 VREF
Table 4-20. Internal Voltage Reference Characteristics
Symbol
(1)
Description Min. Typ. Max. Unit
t
start
Start-up time - 25 - µs
ATmega809/1609/3209/4809 – 48-pin
Electrical Characteristics
© 2019 Microchip Technology Inc.
Datasheet Preliminary
DS40002016B-page 23