Diagram

Analog
Communication
Timer
Extra Features
Debug
This work is licensed under the Creative Commons
Attribution-ShareAlike 4.0 International License. To view
a copy of this license, visit http://creativecommons.
org/licenses/by-sa/4.0/ or send a letter to Creative
Commons, PO Box 1866, Mountain View, CA 94042, USA.
Ground
Power
LED
Internal Pin
SWD Pin
Digital Pin
Analog Pin
Other Pin
Microcontroller’s Port
Default
High Density Connector
STORE.ARDUINO.CC/PORTENTA-H7
WARNING Total output current sourced by
sum of all I/Os and control pins is 140 mA
WARNING Output current sunk by any
I/O and control pin is 20 mA
WARNING Total output current sunk by
sum of all I/Os and control pins is 140 mA
Last update: 23/03/2020
J1
BOTTOM
USB
J1_odd - Extra/Debug
1ETH A+
3ETH A-
5ETH B+
7ETH B-
9
11
13
15
17ETH L1
19ETH L2
21VIN
23USB1 VBUS
25USB1 D+
27USB1 D-
29USB1 ID
31GND
33UART1 TX
35UART1 RX
37UART1 RTS
39UART1 CTS
41VIN
43I2C1 SDA
45I2C1 SD6
47GND
49CAN1 TX
51CAN1 RX
53VSYS
55SDC CLK
57SDC CMD
59SDC D0
61SDC D1
63SDC D2
65SDC D3
67
69
71
73RESET
75SWDIO
77SWCK
79
33
35
37
39
43
45
49
51
55
57
59
61
63
65
75
77
79 SWO
22-Rx_n
3-LED1
2-LED2
23-Rx_p
20-Tx_n
21-Tx_p
LAN8742ai
LAN8742ai
19-HSU-DN
23-OTG-EN
18-HSU-DP
22-HSU-VBUS
PI14
PI15
PB7
PB6
PH13
PB8
PD6
PD7
PB14
PB15
PA10
PA9
USB3320C
DCMI_D7
DCMI_VSYNC
DCMI_VSYNC
LTDC_R5
LTDC_B1/LTDC_B4
LTDC_CLK
LTDC_G2/LTDC_R0
LTDC_G2
LTDC_B6
LTDC_B2
FMC_NWAIT
FMC_NE1
FMC_CLK
FMC_NOE
FMC_A2
FMC_A3
FMC_D15/FMC_DA15
FMC_A16/FMC_CLE
FMC_D2 /FMC_DA2
FMC_D2 /FMC_DA2
SAI1_D1/DAI1_SD-A/SAI4_D1/SAI4_SD-A
DSIHOST_TE
DCMI (video)LTDC (video)
DSIHOST
(video)SAI (audio - interface)
FMC
(flexible memory
controller)
DEBUG_JTMS-SWDIO
DEBUG_JTRST
RTC_REFIN
SYS_PVD-IN
SYS_PVD-IN
DEBUG
RTC
(real time
clock)SYS (clock)
PB3
(
JTDO/TRACESWO
)
PB4
(
NJTRST
)
NRST
PA13
(
JTMS/SWDIO
)
PA14
(
JTCK/SWCLK
)
PB3
(
JTDO/TRACESWO
)