Datasheet
32 / 65 W5500 Datasheet Version1.0 (August 2013)
Register Descriptions 4
4.1 Common Registers
MR (Mode Register) [R/W] [0x0000] [0x00]
2
MR is used for S/W reset, ping block mode and PPPoE mode.
7
6
5
4
3
2
1
0
RST
Reserved
WOL
PB
PPPoE
Reserved
FARP
Reserved
Bit
Symbol
Description
7
RST
If this bit is „1‟, All internal registers will be initialized. It will be
automatically cleared as „0‟ after S/W reset.
6
Reserved
Reserved
5
WOL
Wake on LAN
0 : Disable WOL mode
1 : Enable WOL mode
If WOL mode is enabled and the received magic packet over UDP has
been normally processed, the Interrupt PIN (INTn) asserts to low. When
using WOL mode, the UDP Socket should be opened with any source port
number. (Refer to Socket n Mode Register (Sn_MR) for opening Socket.)
Notice: The magic packet over UDP supported by W5500 consists of 6
bytes synchronization stream („0xFFFFFFFFFFFF‟) and 16 times Target
MAC address stream in UDP payload. The options such like password are
ignored. You can use any UDP source port number for WOL mode.
4
PB
Ping Block Mode
0 : Disable Ping block
1 : Enable Ping block
If the bit is „1‟, it blocks the response to a ping request.
3
PPPoE
PPPoE Mode
0 : Disable PPPoE mode
1 : Enable PPPoE mode
If you use ADSL, this bit should be „1‟.
2
Reserved
Reserved
1
FARP
Force ARP
2
Register Notation : [Read/Write] [Address] [Reset value]