Low Distortion IMX219 M12 Mount Camera Module for Raspberry Pi - Datasheet
Table Of Contents
- Description
 - Features
 - Device Structure
 - USE RESTRICTION NOTICE
 - 1. Block Diagram and Pin Configuration
 - 2. Pixel Signal Output Specifications
 - 3. Control Registers
- 3-1 2-wire Serial Communication Operation Specifications
 - 3-2 2-wire Serial Communication Register Map (Configuration register, Parameter limit register)
 - 3-3 Parameter Limit Registers – [0x1000-0x1FFF] (Read Only and Static)
 - 3-4 Manufacturer Specific Registers – [0x3000-0x5FFF ]
 - 3-5 Frame Bank A and Bank B specific output samples
 
 - 4. Output Data Format
 - 6. On Chip Image Processing
 - 7. NVM Memory Map
 - 8. How to operate IMX219PQH5-C
 - 9. Other Functions
 - 10. Electrical Characteristics
 - 11. Spectral Sensitivity Characteristic
 - 12. Image Sensor Characteristics
 - 13. Measurement Method for Image Sensor Characteristics
 - 14. Spot Pixel Specification
 - 15. Notice on White Pixels Specifications
 - 16. Chief Ray Angle Characteristics
 - 17. Connection Example
 - 18. Notes On Handling
 
IMX219PQH5-C 
38 
3-3-1-4    Read Domain Clock Set-up Capability Registers – [0x1120-0x1137] 
Index 
Byte 
Register Name 
RW 
Comment 
Re-Time 
Default 
(HEX) 
Embd   
DL 
0x1120 
[7:0] 
min_vt_sys_clk_div   
RO 
Minimum video timing system clock divider   
value 
Format: 16-bit unsigned integer   
00 
0x1121 
[7:0] 
01 
0x1122 
[7:0] 
max_vt_sys_clk_div   
RO 
Maximum video timing system clock divider   
value 
Format: 16-bit unsigned integer   
00 
0x1123 
[7:0] 
02 
0x1124 
[7:0] 
min_vt_sys_clk_freq_mhz   
RO 
Minimum video timing system clock frequency 
Format: IEEE 32-bit float Units: MHz   
200 MHz 
43 
0x1125 
[7:0] 
48 
0x1126 
[7:0] 
00 
0x1127 
[7:0] 
00 
0x1128 
[7:0] 
max_vt_sys_clk_freq_mhz   
RO 
Maximum video timing system clock frequency 
Format: IEEE 32-bit float Units: MHz   
700 MHz 
44 
0x1129 
[7:0] 
2F 
0x112A 
[7:0] 
00 
0x112B 
[7:0] 
00 
0x112C 
[7:0] 
min_vt_pix_clk_freq_mhz   
RO 
Minimum video timing pixel clock frequency 
Format: IEEE 32-bit float Units: MHz   
80 MHz 
42 
0x112D 
[7:0] 
A0 
0x112E 
[7:0] 
00 
0x112F 
[7:0] 
00 
0x1130 
[7:0] 
max_vt_pix_clk_freq_mhz   
RO 
Maximum video timing pixel clock frequency 
Format: IEEE 32-bit float Units: MHz   
140 MHz 
43 
0x1131 
[7:0] 
0C 
0x1132 
[7:0] 
00 
0x1133 
[7:0] 
00 
0x1134 
[7:0] 
min_vt_pix_clk_div   
RO 
Minimum video timing pixel clock divider value 
Format: 16-bit unsigned integer   
00 
0x1135 
[7:0] 
05 
0x1136 
[7:0] 
max_vt_pix_clk_div   
RO 
Maximum video timing pixel clock divider value 
Format: 16-bit unsigned integer   
00 
0x1137 
[7:0] 
05 










