Datasheet

Table Of Contents
IMX219PQH5-C
79
8-2 Power off sequence
Perform the power-off in the sequence shown below.
XCLR
CCI
INCK
CLK
+/-
Streaming (Active) Software Standby
Power Off
Hardware
Standby
t3
LP11
LP11
LP11
LP00
LP00
LP00
Data
1 &2 +/-
Data
3 & 4 +/-
t2
XCLR
(internal)
t1
t4
t5
VANA
VDIG
VDDL
VBAT
t0
Fig. 40 Power-off Sequence in 2-wire Serial Communication
Table 38 Operation Specifications in 2-wire Serial Communication
Constraint
Label
Min.
Max.
Units
Comment
Communication end Software standby
t0
One frame
time (*1)
s
Until frame
output
Software standby - XCLR H 
t1
0
ns
Falling time of internal XCLR after
XCLR H 
t2
10
µs
VANA falling - VDIG falling - VDDL falling
t3,t4,t5
VANA, VDIG and VDDL
may fall in any order.
ns
(*1) One frame time = 1/(Frame_Rate[frame/s])
Can set fast standby mode when fast standby register (0x0106)] set to enable (0x01).
Sequence for fast standby mode;
(1) 0x0106 set to 0x01 ( fast standby mode is enable)
(2) 0x0100 set to 0x00 ( SW standby )
(3) Can change to SW standby after read out of current line.