Datasheet

ManualsBrandsArduCAM ManualsCameras & Vision Sensors8MP IMX219 Wide Angle Camera Module for NVIDIA Jetson Nano

Table Of Contents

Description
Features
Device Structure
USE RESTRICTION NOTICE
1. Block Diagram and Pin Configuration
- 1-1 Block Diagram
- 1-2 Pin Description
- 1-3 Pin Equivalent Circuit
- 1-4 Chip Center, Optical Center and Pin Assignment
- 1-5 Pin Coordinates
2. Pixel Signal Output Specifications
- 2-1 CSI-2 Signalling Mode
  - 2-1-1 MIPI Transmitter
  - 2-1-2 Output Lane
    - 2-1-2-1 2Lane Output
3. Control Registers
- 3-1 2-wire Serial Communication Operation Specifications
- 3-2 2-wire Serial Communication Register Map (Configuration register, Parameter limit register)
- 3-3 Parameter Limit Registers – [0x1000-0x1FFF] (Read Only and Static)
  - 3-3-1 Integration Time and Gain Parameter Limit Registers – [0x1000-0x1301]
- 3-4 Manufacturer Specific Registers – [0x3000-0x5FFF ]
- 3-5 Frame Bank A and Bank B specific output samples
4. Output Data Format
- 4-1 CSI-2 Output Data Format
- 5-1 Pixel Array Physical Image
- 5-2 Pixel Binning Mode
- 5-3 image size
- 5-4 Readout Position
- 5-5 Frame Rate Calculation Formula
- 5-6 Black Level Control
- 5-7 Storage Time (Electronic Shutter) Settings
  - 5-7-1 Storage Time (Electronic Shutter) Setting Registers
  - 5-7-2 Storage Time Calculation Method
- 5-8 Gain Settings
  - 5-8-1 Analogue Gain Settings
  - 5-8-2 Digital gain settings
6. On Chip Image Processing
- 6-1 Test Pattern Generator
  - 6-1-1 Test Pattern
- 6-2 Digital Gain Setting
- 6-3 Black Level Adjust
- 6-4 Defect Correction
- 6-5 Pixel Re-alignment H Direction
- 6-6 Pixel Re-alignment V Direction
7. NVM Memory Map
- 7-1 Block Diagram
- 7-2 NVM Functions
- 7-3 Related Registers
- 7-4 NVM Memory Map
- 7-5 Defects Address registration
8. How to operate IMX219PQH5-C
- 8-1 Power on sequence
- 8-2 Power off sequence
9. Other Functions
- 9-1 Clock System
  - 9-1-1 Clock Structure
  - 9-1-2 EXCK_FREQ setting depend on INCK frequency
- 9-2 Clock Setting Example
- 9-3 Temperature Sensor
10. Electrical Characteristics
- 10-1 Absolute Maximum Ratings
- 10-2 Recommended Operating Conditions
- 10-3 Electrical Characteristics
- 10-4 AC Characteristics
  - 10-4-1 Master Clock Waveform Diagram
- 10-5 Electrical Characteristics
11. Spectral Sensitivity Characteristic
12. Image Sensor Characteristics
- 12-1 Image Sensor Characteristics
- 12-2 Zone Definition used for specifying image sensor characteristics
13. Measurement Method for Image Sensor Characteristics
- 13-1 Measurement conditions
- 13-2 Color Coding of This Image Sensor and Readout
- 13-3 Definition of Standard Imaging Conditions
- 13-4 Measurement method
14. Spot Pixel Specification
15. Notice on White Pixels Specifications
- 15-1 Measurement Method for Spot Pixels
- 15-2 Spot Pixel Pattern Specifications
16. Chief Ray Angle Characteristics
17. Connection Example
18. Notes On Handling

IMX219PQH5-C

7-5-4 Example Setting

Example when defect addr are

1st: (228d, 522d), func: adjoin, dir: 1

2nd: (2846d, 1460d), func: 2x4

3rd: (26d, 20d), single

 Offset values are (physical address)

1st: (236d, 570d) , func: adjoin, SRC = 2, DIR = 1, H_ADR = ECh, V_ADR = 23Ah

2nd: (2854d, 1508d) , func:2x4 SRC = 3, DIR = 0, H_ADR = B26h, V_ADR = 5E4h

3rd: (34d, 68d), func: single SRC = 1, DIR = 0, H_ADR = 22h, V_ADR = 44h

Table 35 Example setting of defect pixel

Addr (hex)

description

Value (hex)

2A0

Defines availability of each data

[7:1] reserved

[0]: defect address available

Value 0x00 makes sensor skip copying data from NVM to register.

2A1

defect_num[7:0]

2A2

{DFCT_SRC_10[1:0]CP_DFCT_DIR_10[1:0]

H_DFCT_ADDR_10[11:9]}

2A3

H_DFCT_ADDR_10[7:0]

2A4

V_DFCT_ADDR_10[11:4]

2A5

{V_DFCT_ADDR_10[3:0]

DFCT_SRC_11[1:0]CP_DFCT_DIR_11[1:0]}

2A6

H_DFCT_ADDR_11[11:4]

2A7

{H_DFCT_ADDR_11[3:0], V_DFCT_ADDR_11[11:8]

2A8

V_DFCT_ADDR_11[7:0]

2A9

{DFCT_SRC_12[1:0]CP_DFCT_DIR_12[1:0]

H_DFCT_ADDR_12[11:8]}

2AA

H_DFCT_ADDR_12[7:0]

2AB

V_DFCT_ADDR_12[11:4]

2AC

{V_DFCT_ADDR_12[3:0]

DFCT_SRC_13[1:0]CP_DFCT_DIR_13[1:0]}

2AD

H_DFCT_ADDR_13[11:4]

2AE

{H_DFCT_ADDR_13[3:0], V_DFCT_ADDR_13[11:8]

2AF

H_DFCT_ADDR_13[7:0]