Datasheet

IMX219PQH5-C
7
Table of Figures
Fig. 1 Block Diagram .............................................................................................................................. 10
Fig. 2 Pin Equivalent Circuit .................................................................................................................... 13
Fig. 3 Chip Center and Optical Center..................................................................................................... 14
Fig. 4 Relationship between Output pin name and MIPI output Lane ....................................................... 16
Fig. 5 2-wire Serial Communication ......................................................................................................... 17
Fig. 6 2-wire Serial Communication Protocol ........................................................................................... 17
Fig. 7 Start Condition .............................................................................................................................. 18
Fig. 8 Repeated Start Condition .............................................................................................................. 18
Fig. 9 Stop Condition .............................................................................................................................. 18
Fig. 10 Slave Address ............................................................................................................................. 18
Fig. 11 Acknowledge and Negative Acknowledge .................................................................................... 19
Fig. 12 CCI single read from random location.......................................................................................... 20
Fig. 13 CCI single read from current location........................................................................................... 20
Fig. 14 CCI sequential read starting from random location ...................................................................... 21
Fig. 15 CCI sequential read starting from current location ....................................................................... 21
Fig. 16 CCI single write to random location ............................................................................................. 22
Fig. 17 CCI sequential write starting from random location ...................................................................... 22
Fig. 18 2-wire Serial Communication Specifications ................................................................................ 23
Fig. 19 Function Example for Frame Bank .............................................................................................. 25
Fig. 20 Frame Structure for Serial signal output ...................................................................................... 47
Fig. 21 Signaling Waveform during Line Blanking Period (CSI-2)............................................................. 48
Fig. 22 Signaling Waveform during Frame Blanking Period (CSI-2) ......................................................... 48
Fig. 23 Short Packet & Long Packet ........................................................................................................ 48
Fig. 24 Frame Format during Embedded Data Line Output ..................................................................... 50
Fig. 25 Embedded data lines alignment in RAW8 mode .......................................................................... 50
Fig. 26 Detailed Embedded Data Line Output in RAW10 Output Mode .................................................... 50
Fig. 27 Pixel Array Physical Image .......................................................................................................... 52
Fig. 28 Image of 2x2 averaged Binning Mode ......................................................................................... 53
Fig. 29 Image size .................................................................................................................................. 54
Fig. 30 Readout Position ......................................................................................................................... 55
Fig. 31 Output Image Diagrams for Vertical Flip and Horizontal Mirror ..................................................... 55
Fig. 32 Data Flow Diagram ..................................................................................................................... 62
Fig. 33 Block Diagram ............................................................................................................................ 69
Fig. 34 NVM Map structure ..................................................................................................................... 69
Fig. 35 Single defect ............................................................................................................................... 75
Fig. 36 Same Color Adjoining defect ....................................................................................................... 75
Fig. 37 2x4 defect ................................................................................................................................... 75
Fig. 38 Power-on Sequence in 2-wire Serial Communication Mode ......................................................... 77