Datasheet

Table Of Contents
IMX219PQH5-C
68
0x0274
[0]
BINNING_MODE_H_B
RW
defines binning mode
(H-direction).
0: no-binning,
1: x2-binning
2: x4-binning
3: x2 analog (special)
binning
Frame Bank
0
6-6 Pixel Re-alignment V Direction
The registers required to set the Pixel Re-alignment H Direction are as follows.
Table 30 Pixel Re-alignment V Direction Setting Registers
Index
Byte
Register Name
RW
Comment
Re-Time
Default
(HEX)
Embd
DL
0x168
[3:0]
Y_ADD_STA_A[11:8]
RW
y_addr_start
Frame Bank
00
0x169
[7:0]
Y_ADD_STA_A[7:0]
RW
Frame Bank
00
0x16A
[3:0]
Y_ADD_END_A[11:8]
RW
y_addr_end
Frame Bank
09
0x16B
[7:0]
Y_ADD_END_A[7:0]
RW
Frame Bank
9F
0x268
[3:0]
Y_ADD_STA_B[11:8]
RW
y_addr_start
Frame Bank
0x269
[7:0]
Y_ADD_STA_B[7:0]
RW
Frame Bank
0x26A
[3:0]
Y_ADD_END_B[11:8]
RW
y_addr_end
Frame Bank
0x26B
[7:0]
Y_ADD_END_B[7:0]
RW
Frame Bank
0x175
[0]
BINNING_MODE_V_A
RW
defines binning mode
(V-direction).
0:no-binning
1:x2-binning
2:x4-binning
3:x2 analog (special)
binning
Frame Bank
0x275
[0]
BINNING_MODE_V_B
RW
defines binning mode
(V-direction).
0:no-binning
1:x2-binning
2:x4-binning
3:x2 analog (special)
binning
Frame Bank