Datasheet

IMX219PQH5-C
5
4-1-5 CSI-2 Frame Format ................................................................................................................... 49
4-1-6 CSI-2 Embedded Data Line ......................................................................................................... 50
5-1 Pixel Array Physical Image ................................................................................................................ 52
5-2 Pixel Binning Mode ........................................................................................................................... 53
5-3 image size ......................................................................................................................................... 54
5-4 Readout Position ............................................................................................................................... 55
5-5 Frame Rate Calculation Formula ....................................................................................................... 56
5-6 Black Level Control ........................................................................................................................... 56
5-7 Storage Time (Electronic Shutter) Settings ........................................................................................ 56
5-7-1 Storage Time (Electronic Shutter) Setting Registers .................................................................... 56
5-7-2 Storage Time Calculation Method................................................................................................ 57
5-8 Gain Settings .................................................................................................................................... 58
5-8-1 Analogue Gain Settings............................................................................................................... 58
5-8-2 Digital gain settings ..................................................................................................................... 60
6. On Chip Image Processing ..................................................................................................................... 62
6-1 Test Pattern Generator ...................................................................................................................... 62
6-1-1 Test Pattern ................................................................................................................................ 62
6-2 Digital Gain Setting............................................................................................................................ 67
6-3 Black Level Adjust ............................................................................................................................. 67
6-4 Defect Correction .............................................................................................................................. 67
6-5 Pixel Re-alignment H Direction .......................................................................................................... 67
6-6 Pixel Re-alignment V Direction .......................................................................................................... 68
7. NVM Memory Map.................................................................................................................................. 69
7-1 Block Diagram ................................................................................................................................... 69
7-2 NVM Functions ................................................................................................................................. 69
7-3 Related Registers .............................................................................................................................. 70
7-4 NVM Memory Map ............................................................................................................................ 72
7-5 Defects Address registration .............................................................................................................. 75
7-5-1 Single defect address .................................................................................................................. 75
7-5-2 Same Color Adjoining defect address .......................................................................................... 75
7-5-3 2x4 defect address ...................................................................................................................... 75
7-5-4 Example Setting .......................................................................................................................... 76
8. How to operate IMX219PQH5-C ............................................................................................................. 77
8-1 Power on sequence ............................................................................................................................. 77
8-2 Power off sequence ............................................................................................................................. 79
9. Other Functions ...................................................................................................................................... 81
9-1 Clock System .................................................................................................................................... 81
9-1-1 Clock Structure ........................................................................................................................... 81
9-1-2 EXCK_FREQ setting depend on INCK frequency ........................................................................ 81