Datasheet

Table Of Contents
IMX219PQH5-C
4
Contents
Description...................................................................................................................................................... 1
Features ......................................................................................................................................................... 1
Device Structure ............................................................................................................................................. 2
USE RESTRICTION NOTICE ......................................................................................................................... 3
1. Block Diagram and Pin Configuration...................................................................................................... 10
1-1 Block Diagram ................................................................................................................................... 10
1-2 Pin Description .................................................................................................................................. 10
1-3 Pin Equivalent Circuit ........................................................................................................................ 13
1-4 Chip Center, Optical Center and Pin Assignment ............................................................................... 14
1-5 Pin Coordinates................................................................................................................................. 15
2. Pixel Signal Output Specifications ........................................................................................................... 16
2-1 CSI-2 Signalling Mode ....................................................................................................................... 16
2-1-1 MIPI Transmitter .......................................................................................................................... 16
2-1-2 Output Lane ................................................................................................................................ 16
3. Control Registers .................................................................................................................................... 17
3-1 2-wire Serial Communication Operation Specifications ...................................................................... 17
3-1-1 Communication Protocol ............................................................................................................. 17
3-1-2 2-wire serial communication read/write operation supported ........................................................ 19
3-1-3 2-wire serial communication block characteristics ........................................................................ 23
3-1-4 2-wire serial communication register map .................................................................................... 24
3-1-5 Register Synchronization (Frame Bank) ...................................................................................... 25
3-2 2-wire Serial Communication Register Map (Configuration register, Parameter limit register) ..... 26
3-2-1 Configuration Registers [0x0000-0x0FFF] ................................................................................ 26
3-2-2 Set-up Registers [0x0100-0x0147] ........................................................................................... 28
3-2-3  [0x0150-0x018D] ............................................................... 30
3-2-4 B [0x0254-0x028D] ..................................................................... 32
3-2-5 Set-up Registers [0x0300-0x0627] ........................................................................................... 33
3-3 Parameter Limit Registers [0x1000-0x1FFF] (Read Only and Static) ............................................... 36
3-3-1 Integration Time and Gain Parameter Limit Registers [0x1000-0x1301] .................................... 36
3-4 Manufacturer Specific Registers [0x3000-0x5FFF] .......................................................................... 41
3-5 Frame Bank A and Bank B specific output samples ........................................................................... 43
4. Output Data Format ................................................................................................................................ 47
4-1 CSI-2 Output Data Format ................................................................................................................. 47
4-1-1 CSI-2 Output Data Channels ....................................................................................................... 47
4-1-2 CSI-2 Frame Structure ................................................................................................................ 47
4-1-3 Short Packet & Long Packet ........................................................................................................ 48
4-1-4 Data type .................................................................................................................................... 49