Datasheet
Table Of Contents
- Description
- Features
- Device Structure
- USE RESTRICTION NOTICE
- 1. Block Diagram and Pin Configuration
- 2. Pixel Signal Output Specifications
- 3. Control Registers
- 3-1 2-wire Serial Communication Operation Specifications
- 3-2 2-wire Serial Communication Register Map (Configuration register, Parameter limit register)
- 3-3 Parameter Limit Registers – [0x1000-0x1FFF] (Read Only and Static)
- 3-4 Manufacturer Specific Registers – [0x3000-0x5FFF ]
- 3-5 Frame Bank A and Bank B specific output samples
- 4. Output Data Format
- 6. On Chip Image Processing
- 7. NVM Memory Map
- 8. How to operate IMX219PQH5-C
- 9. Other Functions
- 10. Electrical Characteristics
- 11. Spectral Sensitivity Characteristic
- 12. Image Sensor Characteristics
- 13. Measurement Method for Image Sensor Characteristics
- 14. Spot Pixel Specification
- 15. Notice on White Pixels Specifications
- 16. Chief Ray Angle Characteristics
- 17. Connection Example
- 18. Notes On Handling
IMX219PQH5-C
30
3-2-3 Frame Bank Control and Group “A” – [0x0150-0x018D]
3-2-3-1 Frame Bank Control Registers - [0x0150-0x0153]
Index
Byte
Register Name
RW
Comment
Re-
Time
Default
(HEX)
Embd
DL
0x0150
[1]
FRAME_BANK_STATUS
RO-D
indicates frame bank applied in current frame
X
[0]
FRAME_BANK _ENABLE
RW
defines Frame Bank to be applied in next
frame (manual switching)
0
0x0151
[7:0]
FRAME_BANK _FRM_CNT
RO-D
frame counter value for frame bank switching.
XX
0x0152
[0]
FRAME_BANK
_FAST_TRACKING
RW
When host changes frame_bank_enable
register
under ERS mode, sensor immediately stops
current V-blanking and start new exposure.
0
0x0153
3-2-3-2 Frame Bank Registers Group “A”- [0x0154-0x018D]
Index
Byte
Register Name
RW
Comment
Re-Time
Default
(HEX)
Embd
DL
0x0154
[7:0]
FRAME_DURATION_A
RW
defines number of frames to apply
Frame Bank-A to actual function.
frame bank
00
0x0155
[0]
COMP_ENABLE_A
RW
compression 10 to 8 mode
0: Disable, 1: Enable
frame bank
0
0x0156
0x0157
[7:0]
ANA_GAIN_GLOBAL_A
RW
analogue_gain_code_global
frame bank
00
0x0158
[3:0]
DIG_GAIN_GLOBAL_A [11:8]
RW
digital gain global
frame bank
1
0x0159
[7:0]
DIG_GAIN_GLOBAL_A [7:0]
00
0x015A
[7:0]
COARSE_INTEGRATION_
TIME_A[15:8]
RW
coarse_integration_time
frame bank
03
0x015B
[7:0]
COARSE_INTEGRATION_
TIME_A[7:0]
E8
0x015C
―
Reserved
0x015D
[0]
SENSOR_MODE_A
RO
shutter mode register.
0: ERS, 1: reserved
frame bank
X
0x015E
Reserved
0x015F
Reserved
0x0160
[7:0]
FRM_LENGTH_A[15:8]
RW
frame_length_lines
BINNING_MODE = 0,1,2
Unit: 1Lines
BINNING_MODE = 3
Units: 2Lines
frame bank
0A
0x0161
[7:0]
FRM_LENGTH_A[7:0]
A8
0x0162
[7:0]
LINE_LENGTH_A[15:8]
RW
line_length_pck
Units: Pixels
frame bank
0D
0x0163
[7:0]
LINE_LENGTH_A[7:0]
78
0x0164
[3:0]
X_ADD_STA_A[11:8]
RW
x_addr_start
X-address of the top left corner of the
visible pixel data Units: Pixels
frame bank
0
0x0165
[7:0]
X_ADD_STA_A[7:0]
00
0x0166
[3:0]
X_ADD_END_A[11:8]
RW
x_addr_end
X-address of the bottom right corner of
the visible pixel data Units: Pixels
frame bank
C
0x0167
[7:0]
X_ADD_END_A[7:0]
CF
0x0168
[3:0]
Y_ADD_STA_A[11:8]
RW
y_addr_start
Y-address of the top left corner of the
visible pixel data Units: Lines
frame bank
0
0x0169
[7:0]
Y_ADD_STA_A[7:0]
00
0x016A
[3:0]
Y_ADD_END_A[11:8]
RW
y_addr_end
X-address of the bottom right corner of
the visible pixel data Units: Pixels
frame bank
9
0x016B
[7:0]
Y_ADD_END_A[7:0]
9F
0x016C
[3:0]
x_output_size[11:8]
RW
output image size (X-direction)
Width of image data output from the
sensor module Units: Pixels
frame bank
C
0x016D
[7:0]
x_output_size[7:0]
D0
0x016E
[3:0]
y_output_size[11:8]
RW
output image size (Y-direction)
Height of image data output from the
sensor module Units: Lines
frame bank
9
0x016F
[7:0]
y_output_size[7:0]
A0