Datasheet
Table Of Contents
- 1/2-Inch Megapixel CMOS Digital Image Sensor
- Applications
- General Description
- List of Tables
- List of Figures
- General Description
- Pixel Data Format
- Serial Bus Description
- Two-Wire Serial Interface Sample Write and Read Sequences
- Registers
- Feature Description
- Registers
- Electrical Specifications
- Data Output and Propagation Delays
- Two-wire Serial Bus Timing
- Figure 18: Serial Host Interface Start Condition Timing
- Figure 19: Serial Host Interface Stop Condition Timing
- Figure 20: Serial Host Interface Data Timing for Write
- Figure 21: Serial Host Interface Data Timing for Read
- Figure 22: Acknowledge Signal Timing After an 8-Bit Write to the Sensor
- Figure 23: Acknowledge Signal Timing After an 8-Bit Read from the Sensor
- Quantum Efficiency
- Image Center Offset and Orientation
- Revision History
80a3e031 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9M001_DS_2.fm - Rev.C 7/05 EN
21 ©2004 Micron Technology, Inc. All rights reserved.
MT9M001 - 1/2-Inch Megapixel Digital Image Sensor
Feature Description
Programmable Analog Offset Stage
The programmable analog offset stage corrects for analog offset that might be present in
the analog signal. The user would need to program register 0x62 appropriately to enable
the analog offset correction.
The lower eight bits (bit[7:0]) determines the absolute value of the analog offset to be
corrected and bit[8] determines the sign of the correction. When bit[8] is “1”, the sign of
the correction is negative and vice versa. The analog value of the correction relative to
the analog gain stage can be determined from the following formula:
Analog offset (bit[8] = 0) = bit[7:0] x 2mV
Analog offset (bit[8] = 1) = - (bit[7:0] x 2mV)
Column and Row Mirror Image
By setting bit 14 of Reg0x20, the readout order of the columns will be reversed, as shown
in Figure 11.
Figure 11: Readout of Six Columns in Normal and Column Mirror Output Mode
By setting bits 15 of Reg0x20 the readout order of the rows will be reversed, as shown in
Figure 12.
Figure 12: Readout of Six Rows in Normal and Row Mirror Output Mode
Column and Row Skip
By setting bit 3 of Reg0x20, only half of the columns set will be read out. An example is
shown in Figure 13. Only columns with bit 1 equal to “0” will be read out (xxxxxxx0x).
The row skip works in the same way and will only read out rows with bit 1 equal to “0.”
Row skip mode is enabled by setting bit 4 of Reg0x20. For both row and column skips, the
number of rows or columns read out will be half of what is set in Reg0x03 or Reg0x04,
respectively.
D
OUT
9–D
OUT
0
LINE_VALID
Normal readout
Col0
(9:0)
Col1
(9:0)
Col2
(9:0)
Col3
(9:0)
Col4
(9:0)
Col5
(9:0)
D
OUT
9–D
OUT
0
Reverse readout
Col5
(9:0)
Col4
(9:0)
Col3
(9:0)
Col2
(9:0)
Col1
(9:0)
Col0
(9:0)
D
OUT
9–D
OUT
0
FRAME_VALID
Normal readout
Row0
(9:0)
Row1
(9:0)
Row2
(9:0)
Row3
(9:0)
Row4
(9:0)
Row5
(9:0)
D
OUT
9–D
OUT
0
Reverse readout
Row4
(9:0)
Row5
(9:0)
Row3
(9:0)
Row2
(9:0)
Row1
(9:0)
Row0
(9:0)
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