Datasheet
Table Of Contents
- 1/2-Inch Megapixel CMOS Digital Image Sensor
- Applications
- General Description
- List of Tables
- List of Figures
- General Description
- Pixel Data Format
- Serial Bus Description
- Two-Wire Serial Interface Sample Write and Read Sequences
- Registers
- Feature Description
- Registers
- Electrical Specifications
- Data Output and Propagation Delays
- Two-wire Serial Bus Timing
- Figure 18: Serial Host Interface Start Condition Timing
- Figure 19: Serial Host Interface Stop Condition Timing
- Figure 20: Serial Host Interface Data Timing for Write
- Figure 21: Serial Host Interface Data Timing for Read
- Figure 22: Acknowledge Signal Timing After an 8-Bit Write to the Sensor
- Figure 23: Acknowledge Signal Timing After an 8-Bit Read from the Sensor
- Quantum Efficiency
- Image Center Offset and Orientation
- Revision History
80a3e031 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9M001_DS_2.fm - Rev.C 7/05 EN
20 ©2004 Micron Technology, Inc. All rights reserved.
MT9M001 - 1/2-Inch Megapixel Digital Image Sensor
Feature Description
Feature Description
Signal Path
The MT9M001 signal path consists of two stages, a programmable gain stage and a pro-
grammable analog offset stage.
Programmable Gain Stage
A total programmable gain of 15 is available and can be calculated using the following
formula:
Gain 1 to 8: Gain = (bit[6] + 1) x (bit[5:0] x 0.125)
For gain higher than eight, the user would need to set bit[6:5] = 11 and use the lower 3
LSB's bit[2:0] to set the higher gain values. The formula for obtaining gain greater than
eight is as follows:
Total gain = 8 + bit[2:0]
For example, for total gain = 12, the value to program is bit[6–0] = 1100100.
The maximum total gain = 15, i.e. bit[6:0] = 1100111.
The gain circuitry in the MT9M001 is designed to offer signal gains from one to 15. The
minimum gain of one corresponds to the lowest setting where the pixel signal is guaran-
teed to saturate the ADC under all specified operating conditions. Any reduction of the
gain below this value may cause the sensor to saturate at ADC output values less than
the maximum, under certain conditions. It is recommended that this guideline be fol-
lowed at all times.
Since bit[6] of the gain registers are multiplicative factors for the gain settings, there are
alternative ways of achieving certain gains. Some settings offer superior noise perfor-
mance to others, despite the same overall gain. Recommended gain settings are listed in
Tab le 7.
Figure 10: Signal Path
Table 7: Recommended Gain Settings at 48 MHz
Nominal Gain Increments Recommended Settings
1 to 4.000 0.125 0x08 to 0x20
4.25 to 8.00 0.25 0x51 to 0x60
9 to 15 1.0 0x61 to 0x67
X
+
Pixel Output
(signal
minus reset)
Offset Correction Voltage
(Reg0x60, Reg0x61,
Reg0x63, Reg0x64)
(signed lower 9 bits) x 2mV
10-bit ADC
ADC Data
(9:0)
Gain Selection
(Reg0x2B - 0x2E)
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