Datasheet
Table Of Contents
- 1/2-Inch Megapixel CMOS Digital Image Sensor
- Applications
- General Description
- List of Tables
- List of Figures
- General Description
- Pixel Data Format
- Serial Bus Description
- Two-Wire Serial Interface Sample Write and Read Sequences
- Registers
- Feature Description
- Registers
- Electrical Specifications
- Data Output and Propagation Delays
- Two-wire Serial Bus Timing
- Figure 18: Serial Host Interface Start Condition Timing
- Figure 19: Serial Host Interface Stop Condition Timing
- Figure 20: Serial Host Interface Data Timing for Write
- Figure 21: Serial Host Interface Data Timing for Read
- Figure 22: Acknowledge Signal Timing After an 8-Bit Write to the Sensor
- Figure 23: Acknowledge Signal Timing After an 8-Bit Read from the Sensor
- Quantum Efficiency
- Image Center Offset and Orientation
- Revision History
80a3e031 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9M001_DS_2.fm - Rev.C 7/05 EN
14 ©2004 Micron Technology, Inc. All rights reserved.
MT9M001 - 1/2-Inch Megapixel Digital Image Sensor
Registers
Table 6: Register Description
Register Bit Description
Chip ID
0x00 15:0
This register is read-only and gives the chip identification number: 0x8431.
Window Control
These registers control the size of the window.
0x01 10:0
First row to be read out
—default = 0x000C (12).
0x02 10:0
First column to be read out
—default = 0x0014 (20).
Register value must be an even number.
0x03 10:0
Window height (number of rows - 1)
—default = 0x03FF (1023).
Minimum value for 0x03 = 0x0002.
0x04 10:0
Window width (number of columns - 1)
—default = 0x04FF (1279).
Register value must be an odd number.
Minimum value for 0x04 = 0x0003.
Blanking Control
These registers control the blanking time in a row (called column fill-in or horizontal blanking) and between frames
(vertical blanking). Horizontal blanking is specified in terms of pixel clocks. Vertical blanking is specified in terms of row
readout times. The actual imager timing can be calculated using Table 3, Frame Timing, on page 9.
0x05 10:0
Horizontal Blanking
—default = 0x0009 (9 pixels).
0x06 10:0
Vertical Blanking
—default = 0x0019 (25 rows).
Output Control
This register controls various features of the output format for the sensor.
0x07 0
Synchronize changes (copied to Reg0xF1, bit1).
0 = normal operation. Update changes to registers that affect image brightness (integration time,
integration delay, gain, horizontal blanking and vertical blanking, window size, row/column skip or
row mirror) at the next frame boundary. The “frame boundary” is 8 row_times before the rising
edge of FRAME_VALID. (If “Show Dark Rows” is set, it will be coincident with the rising edge of
FRAME_VALID.)
1 = do not update any changes to these settings until this bit is returned to “0.”
1
Chip Enable (copied to Reg0xF1, bit0).
1 = normal operation.
0 = stop sensor readout. When this is returned to “1,” sensor readout restarts at the starting row in
a new frame. The digital power consumption can then also be reduced to less than 5uA by turning
off the master clock.
2
Reserved
—default is 0; set to zero at all times.
3
Reserved
—default is 0; set to zero at all times.
6
Use Test Data.
When set, a test pattern will be output instead of the sampled image from the sensor array. The
value sent to the D
OUT[9:0] pins will alternate between the Test Data register (Reg0x32) in even
columns and the inverse of the Test Data register for odd columns. The output “image” will have
the same width, height, and frame rate as it would otherwise have. No digital processing (gain or
offset) is applied to the data. When clear (the default), sampled pixel values are output normally.
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