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1/2-Inch Megapixel CMOS Digital Image Sensor

MT9M001 - 1/2-Inch Megapixel Digital Image Sensor

Features

80a3e031 Micron Technology, Inc., reserves the right to change products or specifications without notice.

MT9M001_DS_1.fm - Rev. C 7/05 EN

Products and specifications discussed herein are subject to change by Micron without notice.

1/2-Inch Megapixel CMOS Digital Image Sensor

MT9M001C12STM (Monochrome)

For the latest data sheet, refer to Micron’s Web site: www.micron.com\imaging

Features

• DigitalClarity™ CMOS Imaging Technology

• Array Format (5:4): 1,280H x 1,024V (1,310,720 active

pixels). Total (incl. dark pixels): 1,312H x 1,048V

(1,374,976 pixels)

• Frame Rate: 30 fps progressive scan; programmable

• Shutter: Electronic Rolling Shutter (ERS)

• Window Size: SXGA; programmable to any smaller

format (VGA, QVGA, CIF, QCIF, etc.)

• Programmable Controls: Gain, frame rate, frame

size

Applications

• Digital still cameras

• Digital video cameras

•PC cameras

General Description

The Micron

Imaging MT9M001 is an SXGA-format

with a 1/2-inch CMOS active-pixel digital image sen-

sor. The active imaging pixel array of 1,280H x 1,024V. It

incorporates sophisticated camera functions on-chip

such as windowing, column and row skip mode, and

snapshot mode. It is programmable through a simple

two-wire serial interface.

This megapixel CMOS image sensor features Digital-

Clarity—Micron’s breakthrough low-noise CMOS

imaging technology that achieves CCD image quality

(based on signal-to-noise ratio and low-light sensitiv-

ity) while maintaining the inherent size, cost, and inte-

gration advantages of CMOS.

Table 1: Key Performance Parameters

The sensor can be operated in its default mode or pro-

grammed by the user for frame size, exposure, gain set-

ting, and other parameters. The default mode outputs

an SXGA-size image at 30 frames per second (fps). An

on-chip analog-to-digital converter (ADC) provides 10

bits per pixel. FRAME_VALID and LINE_VALID signals

are output on dedicated pins, along with a pixel clock

that is synchronous with valid data.

Ordering Information

Parameter Typical Value

Optical format 1/2-inch (5:4)

Active imager size 6.66mm(H) x 5.32mm(V)

Active pixels 1,280H x 1,024V

Pixel size 5.2µm x 5.2µm

Shutter type Electronic rolling shutter (ERS)

Maximum data rate/

master clock

48 MPS/48 MHz

Frame

rate

SXGA

(1280 x 1024)

30 fps progressive scan;

programmable

ADC resolution 10-bit, on-chip

Responsivity 2.1 V/lux-sec

Dynamic range 68.2dB

SNR

MAX

45dB

Supply voltage 3.0V

−3.6V, 3.3V nominal

Power consumption 325mW at 3.3V;

Standby 275µW

Operating temperature 0°C to +70°C

Packaging 48-pin CLCC

Table 2: Available Part Numbers

Part Number Description

MT9M001C12STM 46-pin CLCC

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Summary of content (32 pages)

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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Features 1/2-Inch Megapixel CMOS Digital Image Sensor MT9M001C12STM (Monochrome) For the latest data sheet, refer to Micron’s Web site: www.micron.com\imaging Features Table 1: Key Performance Parameters Parameter • DigitalClarity™ CMOS Imaging Technology • Array Format (5:4): 1,280H x 1,024V (1,310,720 active pixels). Total (incl.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Table of Contents Table of Contents Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Ordering Information . .
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor List of Tables List of Tables Table 1: Table 2: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Table 10: Table 11: Table 12: Key Performance Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Available Part Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor List of Figures List of Figures Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: Figure 25: Figure 26: Figure 27: 48-Pin CLCC Package Pinout Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Pixel Data Format Pixel Data Format Pixel Array Structure The MT9M001 pixel array is configured as 1,312 columns by 1,048 rows (shown in Figure 3). The first 16 columns and the first eight rows of pixels are optically black, and can be used to monitor the black level. The last seven columns and the last seven rows of pixels are also optically black. The black row data is used internally for the automatic black level adjustment.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Pixel Data Format Figure 5: Spatial Illustration of Image Readout P0,0 P0,1 P0,2.....................................P0,n-1 P0,n P1,0 P1,1 P1,2.....................................P1,n-1 P1,n 00 00 00 .................. 00 00 00 00 00 00 .................. 00 00 00 VALID IMAGE HORIZONTAL BLANKING Pm-1,0 Pm-1,1.....................................Pm-1,n-1 Pm-1,n 00 00 00 .................. 00 00 00 Pm,0 Pm,1...........................
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Serial Bus Description Serial Bus Description Registers are written to and read from the MT9M001 through the two-wire serial interface bus. The sensor is a two-wire serial interface slave and is controlled by the serial clock (SCLK), which is driven by the serial interface master. Data is transferred into and out of the MT9M001 through the serial data (SDATA) line. The SDATA line is pulled up to 3.3V off-chip by a 1.5KΩ resistor.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Serial Bus Description Slave Address The 8-bit address of a two-wire serial interface device consists of seven bits of address and 1 bit of direction. A “0” (0xBA) in the LSB (least significant bit) of the address indicates the write mode, and a “1” (0xBB) indicates read mode. Data Bit Transfer One data bit is transferred during each clock pulse. The serial interface clock pulse is provided by the master.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Two-Wire Serial Interface Sample Write and Read Sequences Two-Wire Serial Interface Sample Write and Read Sequences 16-Bit Write Sequence A typical write sequence for writing 16 bits to a register is shown in Figure 8. A start bit given by the master, followed by the write address, starts the sequence. The image sensor will then give an acknowledge bit and expects the register address to come first, followed by the 16-bit data.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Registers Table 6: Register Register Description Bit Description Chip ID 0x00 15:0 This register is read-only and gives the chip identification number: 0x8431. Window Control These registers control the size of the window. 0x01 10:0 First row to be read out—default = 0x000C (12). 0x02 10:0 First column to be read out—default = 0x0014 (20). Register value must be an even number.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Registers Table 6: Register Register Description (continued) Bit Description Pixel Integration Control These registers (along with the window sizing and blanking registers) control the integration time for the pixels.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Registers Table 6: Register Register Description (continued) Bit Description Read Mode 1 In read mode 1, this register is used to control many aspects of the readout of the sensor. 0x1E 0 Reserved—default is 0; set to zero at all times. 1 Reserved—default is 0; set to zero at all times. 2 Column Skip 4—default is 0 (disable). 1 = enable. 3 Row Skip 4—default is 0 (disable). 1 = enable. 4 Column Skip 8—default is 0 (disable).
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Registers Table 6: Register Register Description (continued) Bit Description 0x2D 6:0 Even row, odd column—default = 0x08 (8) = 1x gain. 0x2E 6:0 Odd row, odd column—default = 0x08 (8) = 1x gain. 0x35 6:0 Global gain—default = 0x08 (8) = 1x gain. This register can be used to set all four gains at once. Test Data 0x32 11:2 Test Data. The value used to produce a test pattern in “Use Test Data” mode (Reg0x07 bit 6).
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Registers Table 6: Register 0x5F Register Description (continued) Bit Description 5:0 7 Thres_lo—Lower threshold for black level in ADC LSBs—default = 000100. 1 = override automatic Thres_hi and Thres_lo adjust (Thres_hi always = bits 14:8; Thres_lo always = bits 5:0). Default = 0 = Automatic Thres_hi and Thres_lo adjustment. Thres_hi—Maximum allowed black level in ADC LSBs (default = Thres_lo + 5).
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Registers Table 6: Register Register Description (continued) Bit Description Chip Enable and Two-Wire Serial Interface Write Synchronize. 0xF1 0 Mirrors the functionality of Reg0x07 bit1 (Chip Enable). 1 = normal operation. 0 = stop sensor readout; when this is returned to “1,” sensor readout restarts at the starting row in a new frame. 80a3e031 MT9M001_DS_2.fm - Rev.C 7/05 EN 19 Micron Technology, Inc.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Feature Description Feature Description Signal Path The MT9M001 signal path consists of two stages, a programmable gain stage and a programmable analog offset stage. Programmable Gain Stage A total programmable gain of 15 is available and can be calculated using the following formula: Gain 1 to 8: Gain = (bit[6] + 1) x (bit[5:0] x 0.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Feature Description Programmable Analog Offset Stage The programmable analog offset stage corrects for analog offset that might be present in the analog signal. The user would need to program register 0x62 appropriately to enable the analog offset correction. The lower eight bits (bit[7:0]) determines the absolute value of the analog offset to be corrected and bit[8] determines the sign of the correction.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Registers Registers Table 8: Register Black Level Registers bit Description Reg0x5F This register controls the operation of the black level calibration thresholds. 15 No gain dependence. 1 = Thres_lo is set by the programmed value of bits 5:0, Thres_hi is reset to the programmed value (bits 14:8) after every black level average restart. 0 = Thres_lo and Thres_hi are set automatically as described below.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Registers Registers Table 8: Register Black Level Registers (continued) bit Reg0x60, Reg0x61, Reg0x63, Reg0x64 Description These registers contain the 9-bit signed black level calibration values. In normal operation, these values are calculated at the beginning of each frame. However, if Reg0x62, bit 0 is set to “1,” these registers can be written to, overriding the automatic black level calculation.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Registers Still Image Capture with External Synchronization In continuous mode video image capture, the TRIGGER signal should be held LOW or “0.” To capture a still image, the sensor must first be put into snapshot mode by programming a “1” in register 0x1E, bit 8. In snapshot mode, the sensor waits for a TRIGGER signal (FRAME_VALID, LINE_VALID signals are LOW, pixel clock signal continues).
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Electrical Specifications Electrical Specifications Data Output and Propagation Delays By default, the MT9M001 launches pixel data, FRAME_VALID and LINE_VALID with the rising edge of PIXCLK. The expectation is that the user captures DOUT[7:0], FRAME_VALID and LINE_VALID using the rising edge of PIXCLK.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Electrical Specifications Table 9: DC Electrical Characteristics (continued) (DC Setup Conditions: fCLKIN = 48 MHz, VDD = 3.3V, VAA = 3.3V, VAAPIX = 3.3V, TA = 25°C) Symbol Definition ISTDBYD Digital standby current ISTDBYD Digital standby current W/CLK ISTDBYDA Analog standby current Condition Min Typ Max Units STDBY = VDD, CLKIN = 0 MHz STDBY = VDD, CLKIN = 48 MHz — — 9 55 20 125 mA µA STDBY = VDD — 80 100 µA .
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Electrical Specifications Two-wire Serial Bus Timing The two-wire serial bus operation requires certain minimum master clock cycles between transitions. These are specified in the following diagrams in master clock cycles. Figure 18: Serial Host Interface Start Condition Timing 4 5 SCLK SDATA Figure 19: Serial Host Interface Stop Condition Timing 4 5 SCLK SDATA Note: All timing are in units of master clock cycle.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Electrical Specifications Figure 22: Acknowledge Signal Timing After an 8-Bit Write to the Sensor 3 6 SCLK Sensor pulls down SDATA pin SDATA Figure 23: Acknowledge Signal Timing After an 8-Bit Read from the Sensor 6 7 SCLK Sensor tri-states SDATA pin (turns off pull down) SDATA Note: After a read, the master receiver must pull down SDATA to acknowledge receipt of data bits.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Electrical Specifications Image Center Offset and Orientation Figure 25: Image Center Offset 7.75mm Pad 1 Pixel (0,0) Pixel (12, 20) Pixel Array Image Center 0.015mm 0.712mm 7.75mm Black and Boundary Pixels Die Center Table 12: Optical Area Dimensions Optical Area SXGA Chip Size, mm Pixel Center of pixel (20, 12) Center of Pixel (1299, 1035) (including Seal Ring) X-Dimension Y-dimension 3,340.70µm -3,315.2µm 7.75mm 3,372.
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元器件交易网www.cecb2b.com MT9M001 - 1/2-Inch Megapixel Digital Image Sensor Electrical Specifications Figure 27: 48-pin CLCC Package Outline Drawing D 2.21 ±0.27 SUBSTRATE MATERIAL: ALUMINA CERAMIC LID MATERIAL: BOROSILICATE GLASS 0.55 THICKNESS SEATING PLANE A 7.125 ±0.125 B 11.176 0.015 FOR REFERENCE ONLY 47X 1.02 C 1.016 TYP FIRST CLEAR PIXEL 48 1 2.00 48X 0.50 6.398 ±0.125 7.11 13.00 CTR 11.176 14.220 +0.300 -0.125 0.712 FOR REFERENCE ONLY 5.588 1.
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