Datasheet-1
Table Of Contents
- 1/3-Inch Wide-VGA CMOS Digital Image Sensor
- Features
- Applications
- Ordering Information
- Table of Contents
- List of Figures
- List of Tables
- General Description
- Ball Descriptions
- Pixel Data Format
- Color Device Limitations
- Output Data Format
- Serial Bus Description
- Two-Wire Serial Interface Sample Read and Write Sequences
- Feature Description
- Operational Modes
- Signal Path
- On-Chip Biases
- Window Control
- Blanking Control
- Pixel Integration Control
- Variable ADC Resolution
- Gain Settings
- Black Level Calibration
- Row-wise Noise Correction
- Automatic Gain Control and Automatic Exposure Control
- Pixel Clock Speed
- Hard Reset of Logic
- Soft Reset of Logic
- STANDBY Control
- Monitor Mode Control
- Read Mode Options
- LINE_VALID
- LVDS Serial (Stand-Alone/Stereo) Output
- LVDS Output Format
- Electrical Specifications
- Package Dimensions
- Appendix A – Serial Configurations
- Appendix B – Power-On Reset and Standby Timing
- Revision History
PDF: 3295348826/Source:7478516499 Aptina reserves the right to change products or specifications without notice.
MT9V022_DS - Rev.H 6/10 EN
6 ©2005 Aptina Imaging Corporation. All rights reserved.
MT9V022: 1/3-Inch Wide-VGA Digital Image Sensor
General Description
General Description
The Aptina
®
MT9V022 is a 1/3-inch wide-VGA format CMOS active-pixel digital image
sensor with global shutter and high dynamic range (HDR) operation. The sensor has
specifically been designed to support the demanding interior and exterior automotive
imaging needs, which makes this part ideal for a wide variety of imaging applications in
real-world environments.
This wide-VGA CMOS image sensor features DigitalClarity
⎯Aptina’s breakthrough low-
noise CMOS imaging technology that achieves CCD image quality (based on signal-to-
noise ratio and low-light sensitivity) while maintaining the inherent size, cost, and inte-
gration advantages of CMOS.
The active imaging pixel array is 752H x 480V. It incorporates sophisticated camera func-
tions on-chip—such as binning 2 x 2 and 4 x 4, to improve sensitivity when operating in
smaller resolutions—as well as windowing, column and row mirroring. It is program-
mable through a simple two-wire serial interface.
The MT9V022 can be operated in its default mode or be programmed for frame size,
exposure, gain setting, and other parameters. The default mode outputs a wide-VGA-
size image at 60 frames per second (fps).
An on-chip analog-to-digital converter (ADC) provides 10 bits per pixel. A 12-bit resolu-
tion companded for 10 bits for small signals can be alternatively enabled, allowing more
accurate digitization for darker areas in the image.
In addition to a traditional, parallel logic output the MT9V022 also features a serial low-
voltage differential signaling (LVDS) output. The sensor can be operated in a stereo-
camera, and the sensor, designated as a stereo-master, is able to merge the data from
itself and the stereo-slave sensor into one serial LVDS stream.
The sensor is designed to operate in a wide temperature range (–40°C to +85°C).
Figure 1: Block Diagram
Parallel
Video
Data Out
Serial
Register
I/O
Control Register
ADCs
Active-Pixel
Sensor (APS)
Array
752H x 480V
Timing and Control
Digital Processing
Analog Processing
Serial Video
LVDS Out
Slave Video LVDS In
(for stereo applications only)