Datasheet-1

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All other trademarks are the property of their respective owners.
This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final,
these specifications are subject to change, as further product development and data characterization sometimes occur.
MT9V022: 1/3-Inch Wide-VGA Digital Image Sensor
Revision History
PDF: 3295348826/Source:7478516499 Aptina reserves the right to change products or specifications without notice.
MT9V022_DS - Rev.H 6/10 EN
55 ©2005 Aptina Imaging Corporation All rights reserved.
• Updated Table 7, “Default Register Descriptions,” on page 15. Updated Registers 0x00,
0x0D, 0xF0, 0xF1 and 0xFF. Updated Registers 0x10, 0x15, 0x20 and 0xC2 with Rev 3
default values.
• Updated Table 8, “Register Descriptions,” on page 19
0x00, 0xFF – Chip Version: added Rev 1, 2, and 3 values
0x06 – Vertical Blank: minimum number is 4
0x07 – Chip Control bit 5 - PLL generates 480 MHz clock
0x0D – Added reserve bits [9:8]
0x35 – Added calculation for lower and upper register ranges
0xF0 – Bytewise Address register corrected
• Added "Simultaneous Master Mode" on page 20
• Added "Sequential Master Mode" on page 21
• Updated "Snapshot Mode" on page 21
• Updated "Slave Mode" on page 22
• Updated "Pixel Clock Speed" on page 32
• Added "Hard Reset of Logic" on page 33
• Updated Table 10, “DC Electrical Characteristics,” on page 40
• Added Table 11, “Absolute Maximum Ratings,” on page 41
• Updated Figure 35, Propagation Delays for PIXCLK and Data Out Signals, on page 42
• Updated "Appendix A – Serial Configurations" on page 49
• Updated Figure 46, Stand-Alone Topology, on page 49
• Updated Figure 47, Stereoscopic Topology, on page 50
• Added "Appendix B – Power-On Reset and Standby Timing" on page 52
Rev. C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9/05
• Several text changes
• Corrected steps in “Configuration of Sensor for Stereoscopic Serial Output with
Internal PLL” on page 50
Rev. B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6/05
• Updated part number and header on each page
• Updated Table 1, “Key Performance Parameters,” on page 1 (Power Consumption).
• Updated Figure 1, Block Diagram, on page 6; Update “General Description” on page 6
• Updated Table 3, “Ball Descriptions,” on page 8
• Updated Table 7, “Default Register Descriptions,” on page 15 (0xBE - Reserved)
• Updated Table 8, “Register Descriptions,” on page 19 (R0x7F, R0x07[1:0], R0xB2[4],
0xB3[4], 0xBA, remove 0xBE)
• Updated “Pixel Integration Control” on page 24
• Updated Table 10, “DC Electrical Characteristics,” on page 40
• Updated Table 12, “AC Electrical Characteristics,” on page 41
• Replaced “Thermometer” section and figure with section titled “Temperature Refer-
ence” on page 46
• Added Figure 45, 52-Ball IBGA, on page 48