Datasheet-1
Table Of Contents
- 1/3-Inch Wide-VGA CMOS Digital Image Sensor
- Features
- Applications
- Ordering Information
- Table of Contents
- List of Figures
- List of Tables
- General Description
- Ball Descriptions
- Pixel Data Format
- Color Device Limitations
- Output Data Format
- Serial Bus Description
- Two-Wire Serial Interface Sample Read and Write Sequences
- Feature Description
- Operational Modes
- Signal Path
- On-Chip Biases
- Window Control
- Blanking Control
- Pixel Integration Control
- Variable ADC Resolution
- Gain Settings
- Black Level Calibration
- Row-wise Noise Correction
- Automatic Gain Control and Automatic Exposure Control
- Pixel Clock Speed
- Hard Reset of Logic
- Soft Reset of Logic
- STANDBY Control
- Monitor Mode Control
- Read Mode Options
- LINE_VALID
- LVDS Serial (Stand-Alone/Stereo) Output
- LVDS Output Format
- Electrical Specifications
- Package Dimensions
- Appendix A – Serial Configurations
- Appendix B – Power-On Reset and Standby Timing
- Revision History
PDF: 3295348826/Source:7478516499 Aptina reserves the right to change products or specifications without notice.
MT9V022_DS - Rev.H 6/10 EN
46 ©2005 Aptina Imaging Corporation. All rights reserved.
MT9V022: 1/3-Inch Wide-VGA Digital Image Sensor
Electrical Specifications
Figure 41: Acknowledge Signal Timing After an 8-Bit WRITE to the Sensor
Figure 42: Acknowledge Signal Timing After an 8-Bit READ from the Sensor
Note: After a READ, the master receiver must pull down SDATA to acknowledge receipt of data bits. When read
sequence is complete, the master must generate a “No Acknowledge” by leaving S
DATA to float HIGH.
On the following cycle, a start or stop bit may be used.
Temperature Reference
The MT9V022 contains a temperature reference circuit that can be used to measure rela-
tive temperatures. Contact your Aptina field applications engineer (FAE) for more infor-
mation on using this circuit.
SCLK
Sensor pulls down
S
DATA
pin
6
S
DATA
3
SCLK
Sensor tri-states S
DATA pin
(turns off pull down)
7
S
DATA
6