Datasheet
Table Of Contents
- applications
- features
- key specifications
- table of contents
- list of figures
- list of tables
- 1 signal descriptions
- 2 system level description
- 3 block level description
- 4 image sensor core digital functions
- 4.1 mirror and flip
- 4.2 image windowing
- 4.3 test pattern
- 4.4 50/60Hz detection
- 4.5 AEC and AGC algorithms
- 4.6 AEC/AGC steps
- 4.7 black level calibration (BLC)
- 4.8 strobe flash and frame exposure
- 4.9 xenon flash control
- 4.10 frame exposure (FREX) mode
- 4.11 FREX strobe flash control
- 4.12 one-time programmable (OTP) memory
- 5 image sensor processor digital functions
- 6 image sensor output interface digital functions
- 7 register tables
- table 7-1 system control registers (sheet 1 of 5)
- table 7-2 SCCB registers (sheet 1 of 2)
- table 7-3 group hold control registers
- table 7-4 AEC/AGC 1 registers
- table 7-5 system timing registers (sheet 1 of 3)
- table 7-6 AEC/AGC 2 registers (sheet 1 of 3)
- table 7-7 STROBE/frame exposure control registers (sheet 1 of 2)
- table 7-8 50/60 HZ DETECTION registers
- table 7-9 OTP control registers (sheet 1 of 2)
- table 7-10 BLC registers (sheet 1 of 3)
- table 7-11 frame control registers
- table 7-12 DVP registers (sheet 1 of 2)
- table 7-13 MIPI top registers (sheet 1 of 11)
- table 7-14 ISPFC registers
- table 7-15 ISP TOP control registers (sheet 1 of 6)
- table 7-16 AWB registers (sheet 1 of 3)
- table 7-17 average registers (sheet 1 of 2)
- table 7-18 DPC registers
- table 7-19 LENC registers (sheet 1 of 4)
- table 7-20 cluster DPC registers (sheet 1 of 2)
- table 7-21 windows registers
- table 7-22 AEC/AGC 3 registers
- 8 operating specifications
- 9 mechanical specifications
- 10 optical specifications
- revision history
Confidential for truly Only
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI™ technology
OV5647
proprietary to OmniVision Technologies PRELIMINARY SPECIFICATION version 1.0
table 7-10 BLC registers (sheet 1 of 3)
address
register name
default
value
R/W
description
0x4000 BLC CTRL00 0x89 RW
BLC Control
(0: disable ISP; 1: enable ISP)
Bit[7]: blc_median_filter_enable
Bit[6:4]: Not used
Bit[3]: adc_11bit_mode
Bit[2]: apply2blackline
Bit[1]: blackline_averageframe
Bit[0]: BLC enable
0x4001 BLC CTRL01 0x00 RW
Bit[7:6]: Not used
Bit[5:0]: start_line
0x4002 BLC CTRL02 0x45 RW
Bit[7]: format_change_en
format_change_i from fmt will be
effect when it is enable
Bit[6]: blc_auto_en
Bit[5:0]: reset_frame_num
0x4003 BLC CTRL03 0x08 RW
Bit[7]: blc_redo_en
Write 1 into it will trigger a BLC
redo N frames begin
Bit[6]: Freeze
Bit[5:0]: manual_frame_num
0x4004 BLC CTRL04 0x08 RW Bit[7:0]: blc_line_num
0x4005 BLC CTRL05 0x18 RW
Bit[7:6]: Not used
Bit[5]: one_line_mode
Bit[4]: remove_none_imagedata
Bit[3]: blc_man_1_en
Bit[2]: blackline_bggr_man_en
0: bgbg/grgr is decided by
rblue/hswap
1: bgbg/grgr fix
Bit[1]: bgbg/grgr is decided by
rblue/hswap
blc_always_up_en
0: Normal freeze
1: BLC always update
Bit[0]: Not used
0x4006 BLC CTRL06 0x08 RW
Bit[7:6]: Not used
Bit[5]: bl_num_man_en
Bit[4:0]: bl_num_man










