Datasheet

Confidential for truly Only
11.03.2009 PRELIMINARY SPECIFICATION proprietary to OmniVision Technologies
7-1
7 register tables
The following tables provide descriptions of the device control registers contained in the OV5647. For all registers
enable/disable bits, ENABLE = 1 and DISABLE = 0. The device slave addresses are 0x6C for write and 0x6D for read.
table 7-1 system control registers (sheet 1 of 5)
address register name
default
value R/W description
0x3000
SC_CMMN_PAD_
OEN0
0x00 RW
Bit[7:4]: io_y_oen[11:8]
Bit[3:0]: Not used
0x3001
SC_CMMN_PAD_
OEN1
0x00 RW Bit[7:0]: io_y_oen[7:0]
0x3002
SC_CMMN_PAD_
OEN2
0x00 RW
Bit[7]: io_vsync_oen
Bit[6]: io_href_oen
Bit[5]: io_pclk_oen
Bit[4]: io_frex_oen
Bit[3]: io_strobe_oen
Bit[2]: io_sda_oen
Bit[1]: io_gpio1_oen
Bit[0]: io_gpio0_oen
0x3003~
0x3005
DEBUG MODE – – Debug Mode
0x3006
SC_CMMN_PLL_
CTR13
0x00 RW
Bit[7:6]: Debug control
Changing these registers is not
recommended
Bit[5:2]: SDIV
Clock divider for 50/60 Hz
detection block
Bit[1:0]: Debug control
Changing these registers is not
recommended
0x3007 DEBUG MODE – – Debug Mode
0x3008
SC_CMMN_PAD_
OUT0
0x00 RW
Bit[7:4]: Not used
Bit[3:0]: io_y_o[11:8]
0x3009
SC_CMMN_PAD_
OUT1
0x00 RW Bit[7:0]: io_y_o[7:0]
0x300A SC_CMMN_CHIP_ID 0x56 R Chip ID high
0x300B SC_CMMN_CHIP_ID 0x47 R Chip ID low
0x300C SC_CMMN_SCCB_ID 0x6C RW SCCB ID