Datasheet

Confidential for truly Only
color CMOS QSXGA (5 megapixel) image sensor with OmniBSI™ technology
OV5647
proprietary to OmniVision Technologies PRELIMINARY SPECIFICATION version 1.0
0x4824 LPX_P_MIN 0x00 RW
High byte of the minimum value for lpx_p, unit ns
Bit[1:0]: lpx_p_min[9:8]
0x4825 LPX_P_MIN 0x32 RW
Low byte of the minimum value for lpx_p
lpx_p_real = lpx_p_min_o + Tui*ui_lpx_p_min_o
0x4826 HS_PREPARE_MIN 0x00 RW
High byte of the minimum value for hs_prepare, unit ns
Bit[1:0]: hs_prepare_min[9:8]
0x4827 HS_PREPARE_MIN 0x32 RW
Low byte of the minimum value for hs_prepare
hs_prepare_real = hs_prepare_min_o +
Tui*ui_hs_prepare_min_o
0x4827 HS_PREPARE_MIN 0x32 RW
Low byte of the minimum value for hs_prepare
hs_prepare_real = hs_prepare_min_o +
Tui*ui_hs_prepare_min_o
0x4828 HS_EXIT_MIN 0x00 RW
High byte of the minimum value for hs_exit, unit ns
Bit[1:0]: hs_exit_min[9:8]
0x4829 HS_EXIT_MIN 0x64 RW
Low byte of the minimum value for hs_exit
hs_exit_real = hs_exit_min_o + Tui*ui_hs_exit_min_o
0x482A UI_HS_ZERO_MIN 0x05 RW Minimum UI Value of hs_zero, unit UI
0x482B UI_HS_TRAIL_MIN 0x04 RW Minimum UI Value of hs_trail, unit UI
0x482C UI_CLK_ZERO_MIN 0x00 RW Minimum UI Value of clk_zero, unit UI
0x482D
UI_CLK_PREPARE_
MIN
0x00 RW Minimum UI Value of clk_prepare, unit UI
0x482E UI_CLK_POST_MIN 0x34 RW Minimum UI Value of clk_post, unit UI
0x482F UI_CLK_TRAIL_MIN 0x00 RW Minimum UI Value of clk_trail, unit UI
0x4830 UI_LPX_P_MIN 0x00 RW Minimum UI Value of lpx_p, unit UI
0x4831
UI_HS_PREPARE_
MIN
0x04 RW Minimum UI Value of hs_prepare, unit UI
0x4832 UI_HS_EXIT_MIN 0x00 RW Minimum UI Value of hs_exit, unit UI
0x4833 MIPI_REG_MIN 0x00 RW
MIPI register address, lower bound (high byte)
Address range of MIPI RW registers is from
mipi_reg_min to mipi_reg_max
0x4834 MIPI_REG_MIN 0x00 RW MIPI register address, lower bound (low byte)
0x4835 MIPI_REG_MAX 0xFF RW MIPI register address, upper bound (high byte)
0x4836 MIPI_REG_MAX 0xFF RW MIPI register address, upper bound (low byte)
0x4837 PCLK_PERIOD 0x15 RW Period of pclk2x, pclk_div = 1, and 1-bit decimal
table 6-9 MIPI transmitter registers (sheet 7 of 8)
address register name
default
value R/W description