Datasheet

Confidential for truly Only
11.03.2009 PRELIMINARY SPECIFICATION proprietary to OmniVision Technologies
6-7
6.4 timing control
table 6-4 timing control registers (sheet 1 of 2)
address register name
default
value R/W description
0x3800 TIMING_X_ADDR_START 0x00 RW Bit[3:0]: x_addr_start[11:8]
0x3801 TIMING_X_ADDR_START 0x0C RW Bit[7:0]: x_addr_start[7:0]
0x3802 TIMING_Y_ADDR_START 0x00 RW Bit[3:0]: y_addr_start[11:8]
0x3803 TIMING_Y_ADDR_START 0x04 RW Bit[7:0]: y_addr_start[7:0]
0x3804 TIMING_X_ADDR_END 0x0A RW Bit[3:0]: x_addr_end[11:8]
0x3805 TIMING_X_ADDR_END 0x33 RW Bit[7:0]: x_addr_end[7:0]
0x3806 TIMING_Y_ADDR_END 0x07 RW Bit[3:0]: y_addr_end[11:8]
0x3807 TIMING_Y_ADDR_END 0xA3 RW Bit[7:0]: y_addr_end[7:0]
0x3808 TIMING_X_OUTPUT_SIZE 0x0A RW Bit[3:0]: DVP output horizontal width[11:8]
0x3809 TIMING_X_OUTPUT_SIZE 0x20 RW Bit[7:0]: DVP output horizontal width[7:0]
0x380A TIMING_Y_OUTPUT_SIZE 0x07 RW Bit[3:0]: DVP output vertical height[11:8]
0x380B TIMING_Y_OUTPUT_SIZE 0x98 RW Bit[7:0]: DVP output vertical height[7:0]
0x380C TIMING_HTS 0x0A RW Bit[4:0]: Total horizontal size[12:8]
0x380D TIMING_HTS 0x8C RW Bit[7:0]: Total horizontal size[7:0]
0x380E TIMING_VTS 0x07 RW Bit[1:0]: Total vertical size[9:8]
0x380F TIMING_VTS 0xB0 RW Bit[7:0]: Total vertical size[7:0]
0x3810 TIMING_ISP_X_WIN 0x00 RW Bit[3:0]: ISP horizontal offset[11:8]
0x3811 TIMING_ISP_X_WIN 0x04 RW Bit[7:0]: ISP horizontal offset[7:0]
0x3812 TIMING_ISP_Y_WIN 0x00 RW Bit[3:0]: ISP vertical offset[11:8]
0x3813 TIMING_ISP_Y_WIN 0x02 RW Bit[7:0]: ISP vertical offset[7:0]
0x3814 TIMING_X_INC 0x11 RW
Bit[7:4]: h_odd_inc
Horizontal subsample odd increase
number
Bit[3:0]: h_even_inc
Horizontal subsample even increase
number