Datasheet

Confidential for truly Only
11.03.2009 PRELIMINARY SPECIFICATION proprietary to OmniVision Technologies
6-1
6 image sensor output interface digital functions
6.1 system control
System control registers include clock, reset control, and PLL configure.
table 6-1 system control registers (sheet 1 of 4)
address register name
default
value R/W description
0x3000
SC_CMMN_PAD_
OEN0
0x00 RW io_y_oen[11:8]
0x3001
SC_CMMN_PAD_
OEN1
0x00 RW io_y_oen[7:0]
0x3002
SC_CMMN_PAD_
OEN2
0x00 RW
Bit[7]: io_vsync_oen
Bit[6]: io_href_oen
Bit[5]: io_pclk_oen
Bit[4]: io_frex_oen
Bit[3]: io_strobe_oen
Bit[2]: io_sda_oen
Bit[1]: io_gpio1_oen
Bit[0]: io_gpio0_oen
0x3006
SC_CMMN_PLL_
CTR13
0x00 RW
Bit[5:2]: SDIV
Clock divider for 50/60 Hz
detection block
0x3008
SC_CMMN_PAD_
OUT0
0x00 RW Bit[3:0]: io_y_o[11:8]
0x3009
SC_CMMN_PAD_
OUT1
0x00 RW Bit[7:0]: io_y_o[7:0]
0x300A SC_CMMN_CHIP_ID 0x56 R Chip ID High
0x300B SC_CMMN_CHIP_ID 0x47 R Chip ID Low
0x300C SC_CMMN_SCCB_ID 0x6C RW SCCB ID
0x300D
SC_CMMN_PAD_
OUT2
0x00 RW
Bit[7]: io_vsync_o
Bit[6]: io_href_o
Bit[5]: io_pclk_o
Bit[4]: io_frex_o
Bit[3]: io_strobe_o
Bit[2]: io_sda_o
Bit[1]: io_gpio1_o
Bit[0]: io_gpio0_o
0x300E
SC_CMMN_PAD_
SEL0
0x00 RW Bit[3:0]: io_y_sel[11:8]