Datasheet

Table Of Contents
Confidential for truly Only
11.03.2009 PRELIMINARY SPECIFICATION proprietary to OmniVision Technologies
2-3
2.3 format and frame rate
2.4 I/O control
2.4.1 system clock control
The PLL is inside the chip which generates a default 96 MHz clock from 6~27 MHz input clock. An inside programmable
clock divider is used to generate different frame rate timing.
2.5 power up sequence
Based on the system power configuration (1.8V or 2.8V for I/O power), using external DVDD or internal DVDD, the power
up sequence will differ. If 1.8V is used for I/O power, using the internal DVDD is preferred. If 2.8V is used for I/O power,
due to a high voltage drop at the internal DVDD regulator, there is a potential heat issue. Hence, for a 2.8V power system,
OmniVision recommends using an external DVDD source. Due to the higher power down current when using an external
DVDD source, OmniVision strongly recommends cutting off all power supplies, including the external DVDD, when the
sensor is not in use in the case of 2.8V I/O and external DVDD.
2.5.1 power up with internal DVDD
For powering up with the internal DVDD and SCCB access during the power ON period, the following conditions must
occur:
1. if V
DD-IO
and V
DD-A
are turned ON at the same time, make sure V
DD-IO
becomes stable before V
DD-A
becomes stable
2. PWDN is active high with an asynchronized design (does not need clock)
3. PWDN must go high during the power up period
4. for PWDN to go low, power must first become stable (AVDD to PWDN > 5 ms)
5. RESETB is active low with an asynchronized design
6. state of RESETB does not matter during power up period once DOVDD is up
7. master clock XCLK should provide at least 1 ms before host accesses sensor’s SCCB
8. host can access SCCB bus (if shared) during entire period. 20 ms after PWDN goes low or 20 ms after
RESETB goes high if reset is inserted after PWDN goes low, host can access sensor’s SCCB to initialize
sensor
table 2-1 format and frame rate
format resolution frame rate scaling method pixel clock
5 Mpixel 2592x1944 15 fps full resolution 80 MHz
1080p 1920x1080 30 fps cropping 68 MHz
960p 1280x960 45 fps cropping, subsampling/ binning 91.2 MHz
720p 1280x720 60 fps cropping, subsampling/ binning 92 MHz
VGA 640x480 90 fps cropping, subsampling/ binning 46.5 MHz
QVGA 320x240 120 fps cropping, subsampling/ binning 32.5 MHz