Datasheet

Confidential for truly Only
11.03.2009 PRELIMINARY SPECIFICATION proprietary to OmniVision Technologies
1-3
table 1-2 pad configuration under various conditions
signal RESET
a
a. some customer assume PWDN pin = 1 when chip power up
RESET
b
b. PWDN pin = 0 when chip power up
post-RESET software sleep
hardware standby
(power down pin = 1)
VSYNC high-z high-z
input by default
(configurable)
high-z by default
(configurable)
high-z by default
(configurable)
HREF high-z high-z
input by default
(configurable)
high-z by default
(configurable)
high-z by default
(configurable)
PCLK high-z high-z
input by default
(configurable)
high-z by default
(configurable)
high-z by default
(configurable)
D[9:0] high-z high-z
input by default
(configurable)
high-z by default
(configurable)
high-z by default
(configurable)
FREX high-z high-z
input by default
(configurable)
high-z by default
(configurable)
high-z by default
(configurable)
STROBE high-z high-z
input by default
(configurable)
high-z by default
(configurable)
high-z by default
(configurable)
XCLK high-z input input input high-z
SIOD open drain I/O I/O I/O open drain
SIOC high-z input input input high-z
MCP 0 output output 0 0
MCN 0 output output 0 0
MDP0 high-z high-z output high-z high-z
MDN0 high-z high-z output high-z high-z
MDP1 high-z high-z output high-z high-z
MDN1 high-z high-z output high-z high-z