Datasheet

Confidential for truly Only
11.03.2009 PRELIMINARY SPECIFICATION proprietary to OmniVision Technologies
7-25
0x4802 MIPI CTRL 02 0x00 RW
MIPI Control 02
Bit[7]: hs_prepare_sel
0: Auto calculate T_hs_prepare, unit
pclk2x
1: Use hs_prepare_min_o[7:0]
Bit[6]: clk_prepare_sel
0: Auto calculate T_clk_prepare,
unit pclk2x
1: Use clk_prepare_min_o[7:0]
Bit[5]: clk_post_sel
0: Auto calculate T_clk_post, unit
pclk2x
1: Use clk_post_min_o[7:0]
Bit[4]: clk_trail_sel
0: Auto calculate T_clk_trail, unit
pclk2x
1: Use clk_trail_min_o[7:0]
Bit[3]: hs_exit_sel
0: Auto calculate T_hs_exit, unit
pclk2x
1: Use hs_exit_min_o[7:0]
Bit[2]: hs_zero_sel
0: Auto calculate T_hs_zero, unit
pclk2x
1: Use hs_zero_min_o[7:0]
Bit[1]: hs_trail_sel
0: Auto calculate T_hs_trail, unit
pclk2x
1: Use hs_trail.min_o[7:0]
Bit[0]: clk_zero_sel
0: Auto calculate T_clk_zero, unit
pclk2x
1: Use clk_zero_min_o[7:0]
table 7-13 MIPI top registers (sheet 3 of 11)
address register name
default
value R/W description