Datasheet

Table Of Contents
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MT9D111__4_REV5.fm - Rev. B 2/06 EN
65 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
IFP Registers, Page 2
Micron Confidential and Proprietary
214
0xD6
10:0 0x030A
Second Set of Bin Definitions
7:0
Offset for bin 0, divided by 4 on 10-bit scale.
10:8
Bin width, 0-4LSB,1-8LSB,2-16LSB,…7-512LSB on a 10-bit scale.
215
0xD7
13:0 0x000A
Histogram Window Size
12:0 1
Number of pixels in the window used by the histogram, set to width*height.
13 0
Select a bin set to read.
0
bin set 1
1bin set 2
216
0xD8
15:0 0
Pixel Counts for Bin 0 and Bin 1
7:0
Pixel count for bin 0 (lowest values) divided window size, R215:2.
15:8
Pixel count for bin 1 divided by window size, R215:2.
Histogram module uses luma after interpolation. No color correction or gamma is applied. Digital gains and first
black level are applied.
This register may not be read out when image portion containing histogram window is being output.
There are two bin sets which could be read through registers 216 and 217, based on value of bit 13 in reg 215[2].
217
0xD9
15:0 0x0002
Pixel Counts for Bin 2 and Bin 3
7:0
Pixel count for bin 2 divided by G factor.
15:8
Pixel count for bin 3 (highest values) divided by G factor.
240
0xF0
2:0 2
Page Register
0 = sensor core
1 = IFP page 1
2 = IFP page 2
241
0xF1
15:0 0
Bytewise Address
Special address to perform 16-bit reads and writes to the sensor in 8-bit chunks. See “8-Bit
Write Sequence” on page 183.
Table 7: IFP Registers, Page 2 (continued)
Reg # Bits Default Name