Datasheet
Table Of Contents
- 1/3.2-Inch System-On-A-Chip (SOC) CMOS Digital Image Sensor
- Features
- Applications
- Ordering Information
- General Description
- Feature Overview
- Typical Connection
- Ballout and Interface
- Architecture Overview
- Registers and Variables
- Registers
- Registers
- IFP Registers, Page 1
- IFP Registers, Page 2
- JPEG Indirect Registers
- Table 8: JPEG Indirect Registers (See Registers 30 and 31, Page 2)
- Firmware Driver Variables
- Table 9: Drivers IDs
- Table 10: Driver Variables-Monitor Driver (ID = 0)
- Table 11: Driver Variables-Sequencer Driver (ID = 1)
- Table 12: Driver Variables-Auto Exposure Driver (ID = 2)
- Table 13: Driver Variables-Auto White Balance (ID = 3)
- Table 14: Driver Variables-Flicker Detection Driver (ID = 4)
- Table 15: Driver Variables-Auto Focus Driver (ID = 5)
- Table 16: Driver Variables-Auto Focus Mechanics Driver (ID = 6)
- Table 17: Driver Variables-Mode/Context Driver (ID = 7)
- Table 18: Driver Variables-JPEG Driver (ID = 9)
- Table 19: Driver Variables-Histogram Driver (ID = 11)
- MCU Register List and Memory Map
- JPEG Indirect Registers
- Output Format and Timing
- Sensor Core
- Feature Description
- PLL Generated Master Clock
- PLL Setup
- Window Control
- Pixel Border
- Readout Modes
- Figure 20: 6 Pixels in Normal and Column Mirror Readout Modes
- Figure 21: 6 Rows in Normal and Row Mirror Readout Modes
- Table 30: Skip Values
- Figure 22: 8 Pixels in Normal and Column Skip 2x Readout Modes
- Figure 23: 16 Pixels in Normal and Column Skip 4x Readout Modes
- Figure 24: 32 Pixels in Normal and Column Skip 8x Readout Modes
- Figure 25: 64 Pixels in Normal and Column Skip 16x Readout Modes
- Table 31: Row Addressing
- Table 32: Column Addressing
- Frame Rate Control
- Context Switching
- Integration Time
- Flash STROBE
- Global Reset
- Analog Signal Path
- Analog Inputs AIN1-AIN3
- Firmware
- Firmware
- Start-Up and Usage
- General Purpose I/O
- Introduction
- GPIO Output Control Overview
- Waveform Programming
- Notification Signals
- Digital and Analog Inputs
- GPIO Software Drivers
- Auto Focus
- Figure 42: Search for Best Focus
- Figure 43: Scene with Two Potential Focus Targets at Different Distances from Camera
- Figure 44: Dependence of Luminance-Normalized Local Sharpness Scores on Lens Position
- Figure 45: Example of Position Weight Histogram Created by AF Driver
- Figure 46: Auto Focus Windows
- Figure 47: Computation of Sharpness Scores and Luminance Average for an AF Window
- Table 41: Examples of AF Filters that can be Programmed into the MT9D111
- Spectral Characteristics
- Electrical Specifications
- Packaging
- Appendix A: Two-Wire Serial Register Interface
- Protocol
- Sequence
- Bus Idle State
- Start Bit
- Stop Bit
- Slave Address
- Data Bit Transfer
- Acknowledge Bit
- No-Acknowledge Bit
- Page Register
- Sample Write and Read Sequences
- Figure 52: WRITE Timing to R0x09:0-Value 0x0284
- Figure 53: READ Timing from R0x09:0; Returned Value 0x0284
- Figure 54: WRITE Timing to R0x09:0-Value 0x0284
- Figure 55: READ Timing from R0x09:0; Returned Value 0x0284
- Figure 56: Two-Wire Serial Bus Timing Parameters
- Table 46: Two-wire Serial Bus Characteristics
- Revision History
PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D111__4_REV5.fm - Rev. B 2/06 EN
44 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
IFP Registers, Page 1
Micron Confidential and Proprietary
10
0x0A
10:0 0x0488
Pad Slew
2:0 0
In bypass mode (R9[1:0] = 2): slew rate for D
OUT[7:0], PIXCLK, FRAME_VALID, and
LINE_VALID.
During normal operation, the slew of listed pads is set by JPEG configuration registers.
Actual slew depends on load, temperature, and I/O voltage. Set this register based on
customers’ characterization results.
31
Unused.
6:4 0
Slew rate for GPIO[11:0]. Actual slew depends on load, temperature, and I/O voltage.
Set this register based on customers’ characterization results.
70
1 = enable I/O pad input clamp during standby.That prevents elevated standby current
if pad input floating. The pads are GPIO[11:0], D
OUT[7:0], FRAME_VALID, LINE_VALID,
PIXCLK.
0 = disable I/O pad input clamp. Set this bit to “1” before going to soft/hard standby to
reduce the leakage current. When coming out of standby, set this bit back to “0.” If
none of the GPIOs are used as inputs, this bit can be left at “1.”
10:8 4
Slew rate for S
DATA. 7 = fastest slew; 0 = slowest. Actual slew depends on load,
temperature, and I/O voltage. Actual slew depends on load, temperature, and I/O
voltage. Set this register based on customers’ characterization results.
11
0x0B
8:0 0x00DF
Internal Clock Control
01
Reserved.
11
Reserved.
21
Reserved.
31
1 = enable output FIFO clock.
41
1 = enable JPEG clock.
50
Reserved.
61
Reserved.
71
1 = enable GPIO clock.
80
Reserved.
17
0x11
10:0 0x0000
X0 Coordinate for Crop Window
Use the crop window for pan and zoom. Crop coordinates are updated synchronously with frame enable, unless
freeze is enabled. In preview mode crop coordinates are automatically divided by X skip factor.
Coordinates are specified as (X0, Y0) and (X1, Y1), where X0 < X1 and Y0 < Y1. Value is overwritten by mode
driver (ID = 7).
18
0x12
10:0 0x0640
X1 Coordinate for Crop Window +1
See R17:1. Value is overwritten by mode driver (ID = 7).
19
0x13
10:0 0x0000
Y0 Coordinate for Crop Window
See R17:1. Value is overwritten by mode driver (ID = 7).
20
0x14
10:0 0x04B0
Y1 Coordinate for Crop Window +1
See R17:1. Value is overwritten by mode driver (ID = 7).
Table 6: IFP Registers, Page 1 (continued)
Reg # Bits Default Name










