Datasheet
Table Of Contents
- 1/3.2-Inch System-On-A-Chip (SOC) CMOS Digital Image Sensor
- Features
- Applications
- Ordering Information
- General Description
- Feature Overview
- Typical Connection
- Ballout and Interface
- Architecture Overview
- Registers and Variables
- Registers
- Registers
- IFP Registers, Page 1
- IFP Registers, Page 2
- JPEG Indirect Registers
- Table 8: JPEG Indirect Registers (See Registers 30 and 31, Page 2)
- Firmware Driver Variables
- Table 9: Drivers IDs
- Table 10: Driver Variables-Monitor Driver (ID = 0)
- Table 11: Driver Variables-Sequencer Driver (ID = 1)
- Table 12: Driver Variables-Auto Exposure Driver (ID = 2)
- Table 13: Driver Variables-Auto White Balance (ID = 3)
- Table 14: Driver Variables-Flicker Detection Driver (ID = 4)
- Table 15: Driver Variables-Auto Focus Driver (ID = 5)
- Table 16: Driver Variables-Auto Focus Mechanics Driver (ID = 6)
- Table 17: Driver Variables-Mode/Context Driver (ID = 7)
- Table 18: Driver Variables-JPEG Driver (ID = 9)
- Table 19: Driver Variables-Histogram Driver (ID = 11)
- MCU Register List and Memory Map
- JPEG Indirect Registers
- Output Format and Timing
- Sensor Core
- Feature Description
- PLL Generated Master Clock
- PLL Setup
- Window Control
- Pixel Border
- Readout Modes
- Figure 20: 6 Pixels in Normal and Column Mirror Readout Modes
- Figure 21: 6 Rows in Normal and Row Mirror Readout Modes
- Table 30: Skip Values
- Figure 22: 8 Pixels in Normal and Column Skip 2x Readout Modes
- Figure 23: 16 Pixels in Normal and Column Skip 4x Readout Modes
- Figure 24: 32 Pixels in Normal and Column Skip 8x Readout Modes
- Figure 25: 64 Pixels in Normal and Column Skip 16x Readout Modes
- Table 31: Row Addressing
- Table 32: Column Addressing
- Frame Rate Control
- Context Switching
- Integration Time
- Flash STROBE
- Global Reset
- Analog Signal Path
- Analog Inputs AIN1-AIN3
- Firmware
- Firmware
- Start-Up and Usage
- General Purpose I/O
- Introduction
- GPIO Output Control Overview
- Waveform Programming
- Notification Signals
- Digital and Analog Inputs
- GPIO Software Drivers
- Auto Focus
- Figure 42: Search for Best Focus
- Figure 43: Scene with Two Potential Focus Targets at Different Distances from Camera
- Figure 44: Dependence of Luminance-Normalized Local Sharpness Scores on Lens Position
- Figure 45: Example of Position Weight Histogram Created by AF Driver
- Figure 46: Auto Focus Windows
- Figure 47: Computation of Sharpness Scores and Luminance Average for an AF Window
- Table 41: Examples of AF Filters that can be Programmed into the MT9D111
- Spectral Characteristics
- Electrical Specifications
- Packaging
- Appendix A: Two-Wire Serial Register Interface
- Protocol
- Sequence
- Bus Idle State
- Start Bit
- Stop Bit
- Slave Address
- Data Bit Transfer
- Acknowledge Bit
- No-Acknowledge Bit
- Page Register
- Sample Write and Read Sequences
- Figure 52: WRITE Timing to R0x09:0-Value 0x0284
- Figure 53: READ Timing from R0x09:0; Returned Value 0x0284
- Figure 54: WRITE Timing to R0x09:0-Value 0x0284
- Figure 55: READ Timing from R0x09:0; Returned Value 0x0284
- Figure 56: Two-Wire Serial Bus Timing Parameters
- Table 46: Two-wire Serial Bus Characteristics
- Revision History
PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D111__3_REV5.fm - Rev. A 2/06 EN
42 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
Registers
Micron Confidential and Proprietary
Note:
1
See “Flash STROBE” on page 131.
2
Unless integration time is less than one frame.
3
f enabled by bit 3,
4
Causes current frame to stop if triggered during a frame.
R227—0xE3 - External Signal Sampling Control (R/W)
Bit 15 Enable
Sampling
1—Enable external signal sampling.
0—Disable external signal sampling.
0 N N
Bit 14 Show Sample If external sampling is enabled (R0xE3:0[15] = 1):
1—Show external signal samples in the data stream after
LINE_VALID goes LOW.
0
—Don’t show external signal samples in data stream.
0 N N
R240—0xF0 - Page Register (R/W)
Bits 2:0 Page Register Must be kept at “0” to be able to write/read from sensor.
Used in SOC to access other pages with registers.
0 N N
R241—0xF1 - ByteWise Address (R/W)
Bits 15:0 Bytewise
Address
Special address to perform 16-bit reads and writes to the
sensor in 8-bit chunks. See “8-Bit Write Sequence” on
page 183.
0 N N
R242—0xF2 - Context Control (R/W)
Bit 15 Restart Setting this bit causes the sensor to abandon the current
frame and start resetting the first row. Same physical
register as R0x0D:0[1].
0 N YM
Bit 7 Xenon Flash
Enable
Enable Xenon flash. Same physical register as R0x23:0[13].
0 Y N
Bit 3 Read Mode
Select
1—Use read mode context B, R0x20:0.
0—Use read mode context A, R0x21:0.
Bits only found in read mode context B register are always
taken from that register.
1 Y YM
Bit 2 LED Flash
Enable
Enable LED flash. Same physical register as R0x23:0[8].
0 Y Y
Bit 1 Vertical Blank
Select
1—Use vertical blanking context B, R0x06:0.
0
—Use vertical blanking context A, R0x08:0.
1 Y YM
Bit 0 Horizontal
Blank Select
1—Use horizontal blanking context B, R0x05:0.
0
—Use horizontal blanking context A, R0x07:0.
1 Y YM
R255—0xFF - Reserved (R/O)
Bits 15:0 Reserved Reserved.
1519
Table 5: Sensor Register Description (continued)
Bit
Field Description
Default
(Hex)
Sync’d to
Frame Start
Bad
Frame