Datasheet

PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D111__3_REV5.fm - Rev. A 2/06 EN
41 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
Registers
Micron Confidential and Proprietary
Bit 0 Global Reset
Readout
Control
1—Start of readout is controlled by falling edge of
GRST_CTR.
0
—Start of readout is controlled by R0xC2:0 (start readout
time).
0 N N
R193—0xC1 - Start Integration Time (T1) (R/W)
Bits 15:0 Start
Integration
Time (T1)
These 16 bits are compared to the upper bits of a 24-bit
counter, which starts counting master clocks when global
reset starts. When this value is reached, global reset is de-
asserted, and integration time starts. There is a minimum
time period for which global reset is always held. This time
is defined by the physical properties of the boost circuit.
64 N N
R194—0xC2 (194) Start Readout Time (T2) (R/W)
Bits 15:0 Start Readout
Time (T2)
These 16 bits are added to R0xC1:0 (start integration time)
and compared to the 24-bit counter mentioned for R0xC1:0.
The value defines the time from when integration time
starts to when it is guaranteed to end. Readout then
commences.
64 N N
R195—0xC3 - Assert Strobe Time (T3) (R/W)
Bits 15:0 Assert Strobe
Time (T3)
These 16 bits are compared to the upper bits of a 24-bit
counter, which starts counting master clocks when global
reset starts. When this value is reached, the strobe is
asserted.
96 N N
R196—0xC4 - De-assert Strobe Time (T4) (R/W)
Bits 15:0 De-assert
Strobe Time
(T4)
These 16 bits are compared to the upper bits of a 24-bit
counter, which starts counting master clocks when global
reset starts. When this value is reached, the strobe is de-
asserted if strobe control is “0” (R0xC0:0[1]).
C8 N N
R197—0xC5 - Assert Flash Time (R/W)
Bits 15:0 Assert Flash
Time
These 16 bits are compared to the upper bits of a 24-bit
counter, which starts counting master clocks when global
reset starts. When this value is reached, the flash is asserted.
64 N N
R198—0xC6 - De-assert Flash Time (R/W)
Bits 15:0 De-assert Flash
Time
These 16 bits are compared to the upper bits of a 24-bit
counter, which starts counting master clocks when global
reset starts. When this value is reached, the flash is de-
asserted if flash control is “0” (R0xC0:0[2]).
78 N N
R224—0xE0 - AIN3 Sample (R/O)
Bits 9:0 AIN3 Sample Contains sample of AIN3 if external signal sampling is
enabled (R0xE3:0[15] = 1). See “Analog Inputs AIN1–AIN3”
on page 134.
R225—0xE1 - AIN2 Sample (R/O)
Bits 9:0 AIN2 Sample Contains sample of AIN2 if external signal sampling is
enabled (R0xE3:0[15] = 1).
R226—0xE2 - AIN1 Sample (R/O)
Bits 9:0 AIN1 Sample Contains sample of AIN1 if external signal sampling is
enabled (R0xE3:0[15] = 1).
Table 5: Sensor Register Description (continued)
Bit
Field Description
Default
(Hex)
Sync’d to
Frame Start
Bad
Frame