Datasheet

PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D111__7_REV5.fm - Rev. B 2/06 EN
185 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
Appendix A: Two-Wire Serial Register Interface
Micron Confidential and Proprietary
Table 46: Two-wire Serial Bus Characteristics
Note: Either the slave or master device can drive the SCLK line low—the interface protocol deter-
mines which device is allowed to drive the SCLK line at any given time.
Symbol Definition Conditions MIN TYP MAX Units
f
SCLK Serial interface input clock
frequency
f
CLK/16 kHz
t
SCLK Serial interface input clock
period
1/
f
SCLK ns
S
CLK duty cycle
40 50 60 %
t
SRTH Start hold time
WRITE/READ 4*
t
CLK ns
t
SDH SDATA hold
WRITE 4*
t
CLK ns
t
SDS SDATA setup
WRITE 4*
t
CLK ns
t
SHAW SDATA hold to ACK
WRITE 4*
t
CLK ns
t
AHSW ACK hold to SDATA
WRITE 4*
t
CLK ns
t
STPS Stop setup time
WRITE/READ 4*
t
CLK ns
t
STPH Stop hold time
WRITE/READ 4*
t
CLK ns
t
SHAR SDATA hold to ACK
READ 4*
t
CLK ns
t
AHSR ACK hold to SDATA
READ 4*
t
CLK ns
t
SDHR SDATA hold
READ 4*
t
CLK ns
t
SDSR SDATA setup
READ 4*
t
CLK ns
C
IN_SI Serial interface input pin
capacitance
3.5 pF
C
LOAD_SD SDATA max load capacitance
15 pF
R
SD SDATA pull-up resistor
1.5
KΩ