Datasheet

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MT9D111__7_REV5.fm - Rev. B 2/06 EN
164 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
General Purpose I/O
Micron Confidential and Proprietary
Figure 41: Examples of GPIO-Generated Waveforms
Of the four waveforms depicted in Figure 41, the first two are examples of the most com-
plex waveforms that the GPIO can generate. Periods of these waveforms consist of five
different time intervals (subperiods), the first four of which end with a transition to an
opposite state (LOW-to-HIGH or HIGH-to-LOW). Each waveform, W
p
(p = 0, 1), is com-
pletely described by its initial state, S
0p
, the lengths of its five subperiods, T
ip
(i = 0,…, 4),
and the number of periods (repetitions) from the start to the end, N
p
. The simpler wave-
forms W2 and W3 can be described using the same set of numbers, only with some of
the subperiod lengths equal to 0. A valid waveform description must include N
p
> 0 and
at least one T
ip
> 0, (i.e. it must set a nonzero duration for the waveform). Just one T
ip
> 0
gives a constant function of time, W
p
(t) = S0p. Generating such a waveform means keep-
ing a particular GPIO output at LOW or HIGH for the specified time. To toggle an output
between LOW and HIGH, one has to assign to it at least two nonzero T
ip
values.
The S
0p
values are set in the GPIO_DATA_L register. There are two ways to store the N
p
and T
ip
values in the GPIO registers GPIO_WG_N* and GPIO_WG_T*. The first is to allo-
cate 8 bits for each value, which allows one to store values for eight waveforms. The sec-
ond is to allocate 16 bits per value. When this is done across the board, one can define
only up to four waveforms, to be generated at the GPIO0, GPIO2, GPIO4, and GPIO6
pads. However, the GPIO allows users to select "8-bit counter mode" or "16-bit counter
mode" individually for each of the following pairs of outputs: GPIO[1:0], GPIO[3:2],
GPIO[5:4], and GPIO[7:6].
These pairs are put in the 8- or 16-bit counter mode by setting bits [4:7] in register
GPIO_WG_CONFIG to 0 or 1, respectively. The term counter mode is used here because
these bits control the width of counters used in waveform generation. What is described
above as allocating 8 or 16 bits per N
p
or T
ip
value in the GPIO_WG_N* and GPIO_WG_T*
registers, is in fact done by changing counter widths and the way register values are
loaded into the counters. Also, strictly speaking, there is a proportionality, not equality,
relation between T
ip
values and single or coupled GPIO_WG_T* register settings that
represent them. Hence, the statement that T
ip
values are stored in 8-bit or16-bit "cells" is
a bit inaccurate. Perhaps we should say "encoded" instead of "stored."
T
10
T
30
T
20
T
40
T
01
T
22
T
02
T
00
W
0
W
1
W
2
W
3
T
11
S
00
S
01
S
02
S
03
T
03
T
13
T
12
T
41
T
31
T
21