Datasheet
Table Of Contents
- 1/3.2-Inch System-On-A-Chip (SOC) CMOS Digital Image Sensor
- Features
- Applications
- Ordering Information
- General Description
- Feature Overview
- Typical Connection
- Ballout and Interface
- Architecture Overview
- Registers and Variables
- Registers
- Registers
- IFP Registers, Page 1
- IFP Registers, Page 2
- JPEG Indirect Registers
- Table 8: JPEG Indirect Registers (See Registers 30 and 31, Page 2)
- Firmware Driver Variables
- Table 9: Drivers IDs
- Table 10: Driver Variables-Monitor Driver (ID = 0)
- Table 11: Driver Variables-Sequencer Driver (ID = 1)
- Table 12: Driver Variables-Auto Exposure Driver (ID = 2)
- Table 13: Driver Variables-Auto White Balance (ID = 3)
- Table 14: Driver Variables-Flicker Detection Driver (ID = 4)
- Table 15: Driver Variables-Auto Focus Driver (ID = 5)
- Table 16: Driver Variables-Auto Focus Mechanics Driver (ID = 6)
- Table 17: Driver Variables-Mode/Context Driver (ID = 7)
- Table 18: Driver Variables-JPEG Driver (ID = 9)
- Table 19: Driver Variables-Histogram Driver (ID = 11)
- MCU Register List and Memory Map
- JPEG Indirect Registers
- Output Format and Timing
- Sensor Core
- Feature Description
- PLL Generated Master Clock
- PLL Setup
- Window Control
- Pixel Border
- Readout Modes
- Figure 20: 6 Pixels in Normal and Column Mirror Readout Modes
- Figure 21: 6 Rows in Normal and Row Mirror Readout Modes
- Table 30: Skip Values
- Figure 22: 8 Pixels in Normal and Column Skip 2x Readout Modes
- Figure 23: 16 Pixels in Normal and Column Skip 4x Readout Modes
- Figure 24: 32 Pixels in Normal and Column Skip 8x Readout Modes
- Figure 25: 64 Pixels in Normal and Column Skip 16x Readout Modes
- Table 31: Row Addressing
- Table 32: Column Addressing
- Frame Rate Control
- Context Switching
- Integration Time
- Flash STROBE
- Global Reset
- Analog Signal Path
- Analog Inputs AIN1-AIN3
- Firmware
- Firmware
- Start-Up and Usage
- General Purpose I/O
- Introduction
- GPIO Output Control Overview
- Waveform Programming
- Notification Signals
- Digital and Analog Inputs
- GPIO Software Drivers
- Auto Focus
- Figure 42: Search for Best Focus
- Figure 43: Scene with Two Potential Focus Targets at Different Distances from Camera
- Figure 44: Dependence of Luminance-Normalized Local Sharpness Scores on Lens Position
- Figure 45: Example of Position Weight Histogram Created by AF Driver
- Figure 46: Auto Focus Windows
- Figure 47: Computation of Sharpness Scores and Luminance Average for an AF Window
- Table 41: Examples of AF Filters that can be Programmed into the MT9D111
- Spectral Characteristics
- Electrical Specifications
- Packaging
- Appendix A: Two-Wire Serial Register Interface
- Protocol
- Sequence
- Bus Idle State
- Start Bit
- Stop Bit
- Slave Address
- Data Bit Transfer
- Acknowledge Bit
- No-Acknowledge Bit
- Page Register
- Sample Write and Read Sequences
- Figure 52: WRITE Timing to R0x09:0-Value 0x0284
- Figure 53: READ Timing from R0x09:0; Returned Value 0x0284
- Figure 54: WRITE Timing to R0x09:0-Value 0x0284
- Figure 55: READ Timing from R0x09:0; Returned Value 0x0284
- Figure 56: Two-Wire Serial Bus Timing Parameters
- Table 46: Two-wire Serial Bus Characteristics
- Revision History
PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D111__7_REV5.fm - Rev. B 2/06 EN
148 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
Start-Up and Usage
Micron Confidential and Proprietary
Since the quantization memory stores 3 sets (luma and chroma) of quantization tables,
the one that is used for the current frame JPEG encoding is indicated in bit 7:6 of
jpeg.config (quantization table ID). Bit 5 of jpeg.config determines who is responsible
for setting the quantization table ID. If it is “0,” the host processor must program quanti-
zation table ID for every JPEG compressed frame (no need to reprogram it if subsequent
JPEG frames use the same quantization tables). If it is “1,” the JEPG driver sets quantiza-
tion table ID to “0” at the start of JPEG capture (be it still or video) and automatically
select next set of quantization tables for the subsequent frames when the current JPEG
frame is unsuccessful.
Bit 7:6 of jpeg.config = 0, 1, and 2 indicates first, second, and third set of quantization
tables, respectively.
Error Handling and Handshaking
When the capturing of a JPEG snapshot is unsuccessful, the JPEG driver can be config-
ured to enable encoding subsequent frames until it is successful by setting bit 2 of
jpeg.config to “1.” For capturing JPEG video, MT9D111 always encodes subsequent
frames no matter what value bit 2 of jpeg.config is set to.
If bit 1 of jpeg.config is “1,” handshaking with the host processor at every erroneous
JPEG frame is required. When JPEG status register indicates that there is an error in the
current JPEG frame, JPEG encoding is stopped until the host processor sets bit 3 of
jpeg.config to “1” to indicate it is ready to receive next JPEG frame. If the host processor
does not respond to an erroneous JPEG frame within jpeg.timeoutFrames frames, JPEG
capture is terminated. If bit 1 of jpeg.config is “0” or if there is no error in JPEG status
register, no handshaking is required.
The handshaking mechanism is provided so that the host processor has sufficient time
to handle the erroneous JPEG frame and react upon the error condition. For example, if
the JPEG status register indicates FIFO overflow, the host processor should increase
quantization value by changing quantization table scaling factor or selecting another set
of the preloaded quantization tables. If spoof oversize error occurs, the host processor
should increase the spoof frame size by programming registers R16 and R17 on IFP Reg-
ister Page 2 and/or increase quantization value.
Start-Up and Usage
The start-up sequence consists of the following:
1. Power-up
2. Hardware reset
3. Configure and enable PLL
4. Configure pad slew rate
5. Configure preview mode
6. Configure and enable auto focus
7. Configure capture mode
8. Perform lock or capture
To start the part, power up power supplies, provide an input clock, and perform a hard-
ware reset.










