Datasheet

Table Of Contents
PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D111__6_REV5.fm - Rev. B 2/06 EN
130 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
Feature Description
Micron Confidential and Proprietary
Integration Time
Integration time is controlled by R0x09:0 (shutter width in multiples of the row time) and
R0x0C:0 (shutter delay, in PIXCLK_PERIOD/2). R0x0C:0 is used to control sub-row inte-
gration times and only has a visible effect for small values of R0x09:0. The total integra-
tion time,
t
INT, is shown in the equation below:
In the equation, the integration overhead corresponds to the delay between the row
reset sequence and the row sample (read) sequence.
Typically, the value of R0x09:0 is limited to the number of rows per frame (which
includes vertical blanking rows), so that the frame rate is not affected by the integration
time. If R0x09:0 is increased beyond the total number of rows per frame, the sensor adds
blanking rows as needed. Additionally,
t
INT must be adjusted to avoid banding in the
image caused by light flicker. Therefore,
t
INT must be a multiple of 1/120 of a second
under 60Hz flicker, and a multiple of 1/100 of a second under 50Hz flicker.
Maximum Shutter Delay
The shutter delay can be used to reduce the integration time. A programmed value of N
reduces the integration time by N master clock periods. The maximum shutter delay is
set by the row time and the sample time, as shown in the equation below:
If the value in this register exceeds the maximum value given by this equation, the sensor
may not generate an image.
t
INT =
R0x09:0 * Row Time - Integration Overhead - Shutter Delay
where:
Row Time =
(R0x04:0/S + BORDER + HBLANK_REG)*PIXCLK_PERIOD master clock
periods (from Table on page 120)
S=
Skip Factor, multiplied by 2 if binning is enabled
Overhead Time =
260 master clock periods (262 in 1 ADC mode)
Shutter Delay =
R0x0C:0 * PIXCLK_PERIOD master clock periods (/2 in 1 ADC mode)
with default
settings:
t
INT =
(1,232 * (1,600 + 348)) - 260 - 0
=
2,399,676 master clock periods = 66.66ms at 36 MHz
Maximum shutter
delay
=
(Row Time - pointer_operations)
where:
Row Time =
(R0x04:0/S + BORDER + HBLANK_REG)*PIXCLK_PERIOD master clock
periods (from Table on page 120)
S=
Skip Factor, multiplied by 2 if binning is enabled
pointer_operations =
see Table 34 on page 129.
with default settings:
Maximum shutter
delay
=
(1,600 + 348) - 461
=
1,487 (master clock periods)