Datasheet
Table Of Contents
- 1/3.2-Inch System-On-A-Chip (SOC) CMOS Digital Image Sensor
- Features
- Applications
- Ordering Information
- General Description
- Feature Overview
- Typical Connection
- Ballout and Interface
- Architecture Overview
- Registers and Variables
- Registers
- Registers
- IFP Registers, Page 1
- IFP Registers, Page 2
- JPEG Indirect Registers
- Table 8: JPEG Indirect Registers (See Registers 30 and 31, Page 2)
- Firmware Driver Variables
- Table 9: Drivers IDs
- Table 10: Driver Variables-Monitor Driver (ID = 0)
- Table 11: Driver Variables-Sequencer Driver (ID = 1)
- Table 12: Driver Variables-Auto Exposure Driver (ID = 2)
- Table 13: Driver Variables-Auto White Balance (ID = 3)
- Table 14: Driver Variables-Flicker Detection Driver (ID = 4)
- Table 15: Driver Variables-Auto Focus Driver (ID = 5)
- Table 16: Driver Variables-Auto Focus Mechanics Driver (ID = 6)
- Table 17: Driver Variables-Mode/Context Driver (ID = 7)
- Table 18: Driver Variables-JPEG Driver (ID = 9)
- Table 19: Driver Variables-Histogram Driver (ID = 11)
- MCU Register List and Memory Map
- JPEG Indirect Registers
- Output Format and Timing
- Sensor Core
- Feature Description
- PLL Generated Master Clock
- PLL Setup
- Window Control
- Pixel Border
- Readout Modes
- Figure 20: 6 Pixels in Normal and Column Mirror Readout Modes
- Figure 21: 6 Rows in Normal and Row Mirror Readout Modes
- Table 30: Skip Values
- Figure 22: 8 Pixels in Normal and Column Skip 2x Readout Modes
- Figure 23: 16 Pixels in Normal and Column Skip 4x Readout Modes
- Figure 24: 32 Pixels in Normal and Column Skip 8x Readout Modes
- Figure 25: 64 Pixels in Normal and Column Skip 16x Readout Modes
- Table 31: Row Addressing
- Table 32: Column Addressing
- Frame Rate Control
- Context Switching
- Integration Time
- Flash STROBE
- Global Reset
- Analog Signal Path
- Analog Inputs AIN1-AIN3
- Firmware
- Firmware
- Start-Up and Usage
- General Purpose I/O
- Introduction
- GPIO Output Control Overview
- Waveform Programming
- Notification Signals
- Digital and Analog Inputs
- GPIO Software Drivers
- Auto Focus
- Figure 42: Search for Best Focus
- Figure 43: Scene with Two Potential Focus Targets at Different Distances from Camera
- Figure 44: Dependence of Luminance-Normalized Local Sharpness Scores on Lens Position
- Figure 45: Example of Position Weight Histogram Created by AF Driver
- Figure 46: Auto Focus Windows
- Figure 47: Computation of Sharpness Scores and Luminance Average for an AF Window
- Table 41: Examples of AF Filters that can be Programmed into the MT9D111
- Spectral Characteristics
- Electrical Specifications
- Packaging
- Appendix A: Two-Wire Serial Register Interface
- Protocol
- Sequence
- Bus Idle State
- Start Bit
- Stop Bit
- Slave Address
- Data Bit Transfer
- Acknowledge Bit
- No-Acknowledge Bit
- Page Register
- Sample Write and Read Sequences
- Figure 52: WRITE Timing to R0x09:0-Value 0x0284
- Figure 53: READ Timing from R0x09:0; Returned Value 0x0284
- Figure 54: WRITE Timing to R0x09:0-Value 0x0284
- Figure 55: READ Timing from R0x09:0; Returned Value 0x0284
- Figure 56: Two-Wire Serial Bus Timing Parameters
- Table 46: Two-wire Serial Bus Characteristics
- Revision History
PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D111__2_REV5.fm - Rev. B 2/06 EN
12 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
Ballout and Interface
Micron Confidential and Proprietary
Note: 1. See “Standby Hardware Configuration” on page 153.
Table 3: Signal Description
Name Type Description Note
CLKIN Input
Master clock signal (can either drive the on-chip PLL or bypass it).
RESET# Input
Master reset signal, active LOW.
STANDBY Input
Controls sensor’s standby mode.
RSVD Input
Reserved for factory test. Tie to digital ground during normal operation.
AIN1 Input
Analog sampling and test. During normal operation, can be used to feed an
external analog signal to an ADC in the sensor core, in order to have the
signal sampled during horizontal blanking times and stored in a register.
AIN2 Input
Analog sampling and test. Can be used like AIN1 during normal operation.
AIN3 Input
Analog sampling and test. Can be used like AIN1 during normal operation.
SCLK Input
Two-wire serial interface clock.
S
ADDR Input
Selects device address for the two-wire serial interface. The address is 0x90
when SADDR is tied LOW, 0xBA if tied HIGH. See also R0x0D:0[10].
D
OUT0-DOUT7 Input
Eight-bit image data output or most significant bits (MSB) of 10-bit sensor
bypass mode.
1
FRAME_VALID Input
Identifies rows in the active image. 1
LINE_VALID Input
Identifies lines in the active image. 1
PIXCLK Input
Pixel clock. To be used for sampling D
OUT, FRAME_VALID, and LINE_VALID. 1
SDATA I/O
Two-wire serial interface data.
GPIO[7:0] I/O
General purpose digital I/O. Each bit can be independently configured as an
input or output. Outputs are controlled by register-programmable waveform
generator or by writing to registers GPIO_DATA_L and GPIO_DATA_H. Inputs
can be sensed by reading the same registers.
1
FLASH/GPIO11 I/O
GPIO11 or signal to control Xenon or LED flash. 1
GPIO10/STROBE I/O
GPIO10 or signal to control mechanical shutter. 1
GPIO9/D
OUT_LSB I/O
GPIO9 during normal IFP operation or data bit 1 in 10-bit sensor bypass mode. 1
GPIO8D
OUT_LSB0 I/O
GPIO8 during normal IFP operation or data bit 0 in 10-bit sensor bypass mode. 1
V
DD Supply
Digital power (1.8V).
V
DDPLL Supply
PLL power (2.8V).
V
AA Supply
Analog power (2.8V).
VAAPIX Supply
Pixel array power (2.8V).
V
DDQ Supply
I/O power (nominal 1.8V or 2.8V).
V
DDGPIO Supply
I/O power for GPIO (nominal 1.8V or 2.8V).
A
GND Supply
Analog ground.
D
GND Supply
Digital, I/O, and PLL ground.
NC
—
No connect.










