Datasheet

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MT9D111__6_REV5.fm - Rev. B 2/06 EN
108 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
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GPIO_WG_CLKDIV 7:0
The waveform generator has two clock dividers that enable it to
generate waveforms at vastly different paces. Each divider divides
the frequency of the GPIO clock (typically 80 MHz) by a factor 2
d + 1
,
where d is a 4-bit unsigned integer programmed into register
GPIO_WG_CLKDIV.
Bits 3:0 of this register hold d for divider 1.
Bits 7:4 of this register hold d for divider 2.
10B2 0
GPIO_WG_CLKDIV_SEL 7:0
Cleared bit b (b = 0,…,7) tells the waveform generator to use clock
divider 1 when generating waveforms at the pad GPIO(b). Set bits
select clock divider 2 for the corresponding pads.
10B3 0
GPIO_WG_FRAME_SYNC 7:0
If bit b (b=0,…,7) in GPIO_WG_FRAME_SYNC is cleared, waveform
generation at the GPIO(b) output starts/resumes when bit b in
GPIO_WG_SUSPEND is cleared.
Setting bit b in GPIO_WG_FRAME_SYNC changes the conditions
that must be met for waveform generation at GPIO(b) can start/
resume. The clearing of bit b in GPIO_WG_SUSPEND is still
necessary, but no longer sufficient. After that bit is cleared, the
waveform generator restarts on each falling edge of
FRAME_VALID.
10B4 0
GPIO_WG_RESET 7:0
Setting bit b (b = 0,…,7) stops any ongoing waveform generation at
GPIO(b), and resets all counters used in it. The bit must be cleared
before waveform generation can resume.
10B5 0
GPIO_WG_SUSPEND 7:0
Setting bit b (b = 0,…,7) suspends waveform generation at the pad
GPIO(b). Clearing the bit restarts it.
10B6 0
GPIO_NS_TYPE 7:0
Setting bit b (b = 0,…,7) enables a notification signal (NS) at the
end of waveform generation at GPIO(b).
Clearing the bit b enables a NS on next transition at GPIO(b) whose
sign matches the sign indicated by bit b in GPIO_NS_EDGE_L. The
pad may be configured as an output or input and the transition
may be caused by the waveform generator, writing to
GPIO_DATA_L or external forcing.
10B8 0
GPIO_NS_EDGE_H 3:0
Bit b (b = 0,…,3) selects the sign of transitions on pad GPIO(b + 8)
that triggers notification signals. Setting the bit selects rising edges,
clearing it, the falling edges.
10B9 0
GPIO_NS_EDGE_L 7:0
Bit b (b = 0,…,7) selects the sign of transitions on pad GPIO(b) that
triggers notification signals. Setting the bit selects rising edges,
clearing it, the falling edges.
10BA 0
GPIO_NS_MASK_H 3:0
Setting bit b masks all notification signals caused by events on pad
GPIO(b+8). Masked signals do not cause the microcontroller to
wake up. Clearing the bit enables waking up.
10BB 0x0F
GPIO_NS_MASK_L 7:0
Setting bit b (b = 0,…,7) masks all notification signals caused by
events on pad GPIO(b). Masked signals do not cause micro-
controller to wake up. Clearing the bit enables waking up.
10BC 0xFF
GPIO_WG_STROBE_SYNC 7:0
If bit b (b = 0,…,7) in GPIO_WG_STROBE_SYNC is cleared, waveform
generation at GPIO(b) output starts/resumes when bit b in
GPIO_WG_SUSPEND is cleared.
Setting bit b in GPIO_WG_STROBE_SYNC changes the conditions
that must be met for waveform generation on GPIO(b) can start/
resume. The clearing of bit b in GPIO_WG_SUSPEND is still
necessary, but no longer sufficient. After that bit is cleared, the
waveform generator restarts on each rising edge of STROBE.
10BD 0
Table 23: GPIO Registers (continued)
Register Name Bits Register Content/Function
Addr
(Hex) Default