Datasheet

PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D111__6_REV5.fm - Rev. B 2/06 EN
107 ©2004 Micron Technology, Inc. All rights reserved.
MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor
JPEG Indirect Registers
Micron Confidential and Proprietary
GPIO_WG_T47 7:0
Fifth subperiod of waveform generated at GPIO7 (in 8-bit counter
mode) or bits 15:8 of fifth subperiod of waveform output at GPIO6
(in 16-bit counter mode).
10AC 0
GPIO_WG_T46 7:0
Fifth subperiod of waveform generated at GPIO6 (in 8-bit counter
mode) or bits 7:0 of the same (in 16-bit counter mode).
10AD 0
GPIO_WG_N7 7:0
Writing to this register sets the duration of waveform generated at
GPIO7 (in 8-bit counter mode) or bits 15:8 of the duration of
waveform generated at GPIO6 (in 16-bit counter mode). Finite
duration is selected by writing the desired number of periods in the
waveform. Writing “0” makes the duration infinite.
When read, this registers returns the number of waveform periods
left to be generated at GPIO7 (in 8-bit counter mode) or bits 15:8 of
the number remaining at GPIO6 (in 16-bit counter mode). To get all
16 bits of the latter number right, one must read this register
before GPIO_WG_N6.
10AE 0
GPIO_WG_N6 7:0
Writing to this register sets the duration of waveform generated at
GPIO6 (in 8-bit counter mode) or bits 7:0 of the same (in 16-bit
counter mode). Finite duration is selected by writing the desired
number of periods in the waveform. Writing “0” makes the
duration infinite.
When read, this register returns the number of waveform periods
left to be generated at GPIO6 (in 8-bit counter mode) or bits 7:0 of
the same (in 16-bit counter mode).
10AF 0
GPIO_WG_CONFIG 3:0
Setting/clearing bit b (b = 0,...,3) enables/disables waveform
generation at the pads GPIO(2b) and GPIO(2b + 1).
10B0 0
7:4
Clearing bit b (b = 4,...,7) enables the waveform generator to drive
the pads GPIO(2b - 8) and GPIO(2b - 7) simultaneously. Counters
needed to generate waveforms at these pads are put in the 8-bit
mode.
Setting bit b disconnects the waveform generator from the pad
GPIO(2b - 7) and allows it to generate a waveform at the pad
GPIO(2b - 8) using the 16-bit counter mode.
0
GPIO_WG_CHAIN 6:0
By setting bits 6:0 in this register, one can link waveforms
generated at different pads into a chain. The end of the first
waveform in the chain coincides with the start of the second
waveform, and so on.
Specifically, for b = 0, 2, 4, the following is true:
Setting bit b forces the waveform generator to start driving
GPIO(b) when it is done with GPIO(b + 1) (in 8-bit counter mode) or
GPIO(b + 2) (in 16-bit counter mode).
Setting bit (b + 1) forces the waveform generator in to start driving
GPIO(b + 1) when done with GPIO(b + 2) (in 8-bit counter mode;
the bit is ignored in 16-bit mode).
In addition, setting bit 6 forces the waveforms generator to start
driving GPIO6 when done with GPIO7 (in 8-bit counter mode; the
bit is ignored in 16-bit mode).
10B1 0
Table 23: GPIO Registers (continued)
Register Name Bits Register Content/Function
Addr
(Hex) Default