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1/3.2-Inch System-On-A-Chip (SOC) CMOS Digital Image Sensor

MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor

Features

Micron Confidential and Proprietary

PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 Micron Technology, Inc., reserves the right to change products or specifications without notice.

MT9D111__1_REV5.fm - Rev. B 2/06 EN

Products and specifications discussed herein are subject to change by Micron without notice.

1/3.2-Inch System-On-A-Chip (SOC) CMOS

Digital Image Sensor

MT9D111

Features

• DigitalClarity™ CMOS Imaging Technology

• Superior low-light performance

• Ultra-low-power, low-cost

• Internal master clock generated by on-chip phase-

locked loop oscillator (PLL)

• Electronic rolling shutter (ERS), progressive scan

• Integrated image flow processor (IFP) for single-die

camera module

• Automatic image correction and enhancement,

including lens shading correction

• Arbitrary image decimation with anti-aliasing

• Integrated real-time JPEG encoder

• Integrated microcontroller for flexibility

• Two-wire serial interface providing access to

registers and microcontroller memory

• Selectable output data format: ITU-R BT.601

(YCbCr), 565RGB, 555RGB, 444RGB, JPEG 4:2:2,

JPEG 4:2:0, and raw 10-bit

• Output FIFO for data rate equalization

•Programmable I/O slew rate

• Xenon and LED flash support with fast exposure

adaptation

• Flexible support for external auto focus, optical

zoom, and mechanical shutter

Applications

• Cellular phones

•PC cameras

•PDAs

Ordering Information

Table 1: Key Performance Parameters

Parameter Value

Optical format 1/3.2-inch (4:3)

Full resolution 1,600 x 1,200 pixels (UXGA)

Pixel size 2.8µm x 2.8µm

Active pixel array area 4.73mm x 3.52mm

Shutter type Electronic rolling shutter (ERS)

with global reset

Maximum frame rate 15 fps at full resolution,

30 fps in preview mode,

(800 x 600)

Maximum data rate/

master clock

80 MB/s

6 MHz to 80 MHz

Supply voltage

Analog 2.5V−3.1V

Digital 1.7V−1.95V

I/O 1.7V−3.1V

PLL 2.5V−3.1V

ADC resolution 10-bit, on-die

Responsivity 1.0/lux-sec (550nm)

Dynamic range 71dB

SNR

MAX 42.3dB

Power consumption

348mW at 15 fps, full resolution

223mW at 30 fps, preview mode

Operating temperature -30°C to +70°C

Package Bare die, 64-ball iCSP

Table 2: Available Part Numbers

Part Number Description

MT9D111 64-ball iCSP

MT9D111D00STCK15LC1 Bare die

MT9D111W00STCK15LC1 Wafer

Summary of content (186 pages)

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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Features 1/3.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Table of Contents Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Table of Contents Auto Exposure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Auto White Balance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Flicker Detection . . . . . . . . . . . . . . . .
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Table of Contents Minimum Row Time Requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Context Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Integration Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Table of Contents Configure Capture Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Perform Lock or Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standby Sequence . . . . . . . . . . . . . . . . . . . . . . . .
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor List of Figures List of Figures Figure 1: Typical Configuration (Connection) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Figure 2: Ball Assignment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Figure 3: Block Diagram . . . . . . . . . . . . . . .
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor List of Figures Figure 55: Figure 56: READ Timing from R0x09:0; Returned Value 0x0284 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184 Two-Wire Serial Bus Timing Parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 184 PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111_REV5LOF.fm - Rev.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Description General Description Micron® Imaging MT9D111 is a 1/3.2 inch 2-megapixel CMOS image sensor with an integrated advanced camera system. The camera system features a microcontroller (MCU) and a sophisticated image flow processor (IFP) with a real-time JPEG encoder.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Typical Connection Typical Connection 1KΩ Two-Wire Serial Bus 6 MHz–80 MHz Clock VDDPLL VAA VAA4 VAAPIX4 VDD VDD4 VDDQ4 VDDGPIO4 1.5KΩ1 1.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview Architecture Overview Figure 3: Block Diagram Image Flow Processor Decimator Line Buffers Interpolation Line Buffers Sensor Core JPEG Line Buffers Color Pipeline PLL JPEG Stats Engine Other JPEG Memories F I F O Internal Register Bus ROM Microcontroller SRAM Sensor Core The MT9D111 sensor core is based on Micron’s MT9D011, a stand-alone, 2-megapixel CMOS image sensor with a 2.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview Black Level Conditioning and Digital Gain Image stream processing starts with black level conditioning and multiplication of all pixel values by a programmable digital gain. Lens Shading Correction Inexpensive lenses tend to produce images whose brightness is significantly attenuated near the edges. Chromatic aberration in such lenses can cause color variation across the field of view.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview Color Correction and Aperture Correction In order to achieve good color fidelity of IFP output, interpolated RGB values of all pixels are subjected to color correction. The IFP multiplies each vector of three pixel colors by a 3 x 3 color correction matrix. The three components of the resulting color vector are all sums of three 10-bit numbers.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview smaller than the default 1600 x 1200 window. Pixels outside the selected cropping window are not read out, which results in narrower field of view than at the default sensor settings.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview Figure 5: JPEG Encoder Block Diagram SOC_DOUT (YCbCr or RGB) Data Packing Re-order Line Buffers (8Y + 8C) Re-order Buffer Controller Data Unpacking JPEG Encoder Block JPEG Input Control JPEG Encoder Memories Control Registers/Status MUX IFP Register Bus Output Buffer 800 x 16 Buffer Control Buffer Fullness Detect RegFile 2 x 16 LD/UNLD Control Adaptive PIXCLK ITU-R BT.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview When a decision to adapt PIXCLK frequency is made, LINE_VALID, which qualifies the 8bit data output (DOUT), is de-asserted until PIXCLK is safely switched to the new clock. LINE_VALID is independent of the horizontal timing of the uncompressed imaged. Its assertion is strictly based on compressed image data availability.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview Auto Focus Algorithm Auto focus (AF) algorithm implemented in the MT9D111 firmware seeks to maximize sharpness of vertical lines in images output by the sensor, by guiding an external lens actuator to the position of best lens focus.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview ima, if any, are sorted by position and used to build a weight histogram of the scanned positions. The histogram is build by assigning to each position the sum of weights of all AF windows whose normalized sharpness scores peaked at that position. The position with the highest weight in the histogram is then selected as the best lens position.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview can provide 30 fps image input for the display and simultaneously translate user commands received via two-wire serial interface into digital waveforms driving the lens actuator. Lens Actuator Interface Actuators used to move lenses in AF cameras can be classified into several broad categories that differ significantly in their requirements for driving signals.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview Preview Context A is primarily intended for use in the preview mode. During preview, the sensor usually outputs low resolution images at a relatively high frame rate, and its power consumption is kept to a minimum. Context B can be configured for the still capture or video mode, as required by the user.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Architecture Overview Scene Evaluative Algorithm A scene evaluative AE algorithm is available for use in snapshot mode. The algorithm performs scene analysis and classification with respect to its brightness, contrast and composure and then decides to increase, decrease or keep original exposure target. It makes most difference for backlight and bright outdoor conditions.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers and Variables Registers and Variables Four types of configuration controls are available: 1. Hardware registers 2. Driver variables 3. Special function registers (SFR) 4. MCU SRAM The following convention is used in the text below to designate registers and variables: R0x12:1, R0x12:1[3:0] or R18:1, R18:1[3:0] These refer to two-wire accessible register number 18, or 0x12 hexadecimal, located on page 1.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers and Variables • Read R200:1 for the current variable value To set the variable mon.arg1=0x1234: • • • • • • The variable has a driver ID of 0. Therefore, set R198:1[12:8]=0 The variable has an offset of 3. Therefore, set R198:1[7:0]=3 This is a logical access. Therefore, set R198:1[14:13]=01 The size of the variable is 16 bits.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Registers Sensor Core Registers Table 4: Sensor Core Register Defaults PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__2_REV5.fm - Rev.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 4: Sensor Core Register Defaults (continued) PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__2_REV5.fm - Rev.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Registers Notation used in the sensor register description table: Sync’d to frame start N = No. The register value is updated and used immediately. Y = Yes. The register value is updated at next frame start as long as the synchronize changes bit is 0. Frame start is defined as when the first dark row is read out. By default, this is 8 rows before FRAME_VALID goes HIGH.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Description Default (Hex) Sync’d to Frame Start Bad Frame 20 Y N AE Y YM 10 Y N 4D0 Y N 0 N N 1 N N 1 Y YM 0 Y N2 R6—0x06 - Vertical Blanking—Context B (R/W) Bits 14:0 Vertical Blanking— Context B Number of blank rows in a frame when context B is selected (R0xF2:0[1] = 1).
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Default (Hex) Sync’d to Frame Start Bad Frame The amount of time from the end of the sampling sequence to the beginning of the pixel reset sequence. If the value in this register exceeds the row time, the reset of the row does not complete before the associated row is sampled, and the sensor does not generate an image.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Description Bit 2 Standby Bit 1 Restart Bit 0 Reset Setting this bit to 1 places the sensor in a low-power state. Any attempt to access registers R[0xF7:0xFD]:0 in this state results in a sensor hang-up. The sensor cannot recover from it without a hard reset or power cycle.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Bit 13 Bits 12:11 Bit 10 Bit 9 Bit 8 Bit 7 Bits 6:5 Description 0—Normal operation. 1—Zoom is enabled, with zoom factor [zoom] defined in bits 12:11. In zoom mode, the pixel data rate is slowed by a factor of [zoom]. This is achieved by outputting [zoom - 1] blank rows between each output row.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Bit 4 Bits 3:2 Description Row Skip Enable— Context B Row Skip— Context B Bit 1 Mirror Columns Bit 0 Mirror Rows When read mode context B is selected (R0xF2:0[3] = 1): 1—Enable row skip. 0—Normal readout.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Bits 3:2 Description Row Skip— Context A When read mode context A is selected (R0xF2:0[3] = 0) and Row skip is enabled (bit 4 = 1): 00—Row Skip 2x 01—Row Skip 4x 10—Row Skip 8x 11—Row Skip 16x See “Column and Row Skip” on page 125 for more information.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Default (Hex) Sync’d to Frame Start Bad Frame 1 N N 1 N N 0 Y Y1 8 N N 1 N N 0 N N 0 N N 0 N N3 The bottom dark rows are visible in the image if the bit is set. Defines the start address within the 8 bottom dark rows. Enable readout of the bottom dark rows.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Bits 6:0 Description Initial Gain Initial gain = bits 6:0*0.03125.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Bits 9:0 Default (Hex) Sync’d to Frame Start Bad Frame 2A N Y FF N N Upper threshold for targeted black level in ADC LSBs. 23 N N Lower threshold for targeted black level in ADC LSBs. 1D N N 0 Y N 0 Y N 0 N N Description Row Noise Constant Constant used in the row noise cancellation algorithm.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Bit 9 Bit 8 Bits 7:5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Description Freeze Calibration When set, does not let the averaging mode of the black level algorithm change the calibration value.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Bit 0 Description Global Reset Readout Control 1—Start of readout is controlled by falling edge of GRST_CTR. 0—Start of readout is controlled by R0xC2:0 (start readout time).
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Registers Table 5: Sensor Register Description (continued) Bit Field Description Default (Hex) Sync’d to Frame Start Bad Frame R227—0xE3 - External Signal Sampling Control (R/W) Bit 15 Enable Sampling 1—Enable external signal sampling. 0—Disable external signal sampling.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 1 IFP Registers, Page 1 Table 6: Reg # 8 0x08 9 0x09 IFP Registers, Page 1 Bits Default Name 10:0 0 0x01F8 0 1 0 2 3 4 5 0 1 1 1 6 7 8 9 1 1 1 0 10 4:0 1:0 0 0x000A 1 2 4:3 0 1 Color Pipeline Control Toggles the assumption about Bayer CFA (vertical shift). 0—row containing Blue comes first. 1—row with Red comes first. Toggles the assumption about Bayer CFA (horizontal shift).
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 1 Table 6: Reg # 10 0x0A 11 0x0B 17 0x11 18 0x12 19 0x13 20 0x14 IFP Registers, Page 1 (continued) Bits Default Name 10:0 2:0 0x0488 0 3 6:4 1 0 7 0 Pad Slew In bypass mode (R9[1:0] = 2): slew rate for DOUT[7:0], PIXCLK, FRAME_VALID, and LINE_VALID. During normal operation, the slew of listed pads is set by JPEG configuration registers.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 1 Table 6: Reg # 21 0x15 22 0x16 23 0x17 32 0x20 45 0x2D 46 0x2E 48 0x30 49 0x31 50 0x32 53 0x35 IFP Registers, Page 1 (continued) Bits Default 13:0 0 1 2 0x0000 0 0 0 Name Decimator Control Reserved. Reserved. High precision mode. Additional bits for result are stored. Can only be used for decimation > 2. 3 0 Reserved. 4 0 Enable 4:2:0 mode. 5:6 0 Reserved.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 1 Table 6: Reg # 54 0x36 55 0x37 59 0x3B 60 0x3C 67 0x43 68 0x44 69 0x45 70 0x46 71 0x47 IFP Registers, Page 1 (continued) Bits Default Name 15:0 0x1208 2D Aperture Correction Parameters 7:0 8 Ap_knee; threshold for aperture signal. 10:8 2 Ap_gain; gain for aperture signal. 13:11 2 Ap_exp; exponent for gain for aperture signal. 14 0 Reserved. Defines 2D aperture gain and threshold.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 1 Table 6: Reg # 72 0x48 73 0x49 74 0x4A 75 0x4B 78 0x4E 96 0x60 97 0x61 98 0x62 99 0x63 100 0x64 101 0x65 IFP Registers, Page 1 (continued) Bits Default 2:0 2:0 0 0 Name 9:0 256 Test Pattern G/Monochrome Value 9:0 256 Test Pattern B Value Test Pattern Test mode.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 1 Table 6: Reg # 102 0x66 106 0x6A 107 0x6B 108 0x6C 109 0x6D 110 0x6E 122 0x7A 123 0x7B 124 0x7C 125 0x7D 150 0x96 IFP Registers, Page 1 (continued) Bits Default 13:0 7:0 13:8 0x3D9C 156 61 0 0 0 0 Name Color Correction Matrix Element 9 Mantissa and Signs Color correction matrix element 9 (C33). Signs for off-diagonal CCM elements.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 1 Table 6: Reg # 151 0x97 152 0x98 153 0x99 154 0x9A 164 0xA4 165 0xA5 IFP Registers, Page 1 (continued) Bits Default Name 7:0 0 0 0 1 0 2 3 4 0 0 0 5 0 7:6 0 2:0 0 1 2 5:3 0 0 0 0 0 6 7 0 0 11:0 R/O Output Format Configuration In YUV output mode, swaps Cb and Cr channels. In RGB mode, swaps R and B. This bit is subject to synchronous update.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 1 Table 6: Reg # 178 0xB2 179 0xB3 180 0xB4 181 0xB5 182 0xB6 183 0xB7 184 0xB8 185 0xB9 186 0xBA 187 0xBB 190 0xBE IFP Registers, Page 1 (continued) Bits Default Name 15:0 0x2700 Gamma Curve Knees 0 and 1 7:0 Ordinate of gamma curve knee point 0 (its abscissa is 0). 15:8 Gamma curve knee point 1.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 1 Table 6: Reg # 191 0xBF 195 0xC3 198 0xC6 IFP Registers, Page 1 (continued) Bits Default 15:0 15:8 7:0 15:0 0 0 0 0 Y/RGB Offset Y offset. RGB offset. Microcontroller Boot Mode 0 1,2,3,6:4, 6:5,7:5 7 11:8,12,13, 14,15 15:0 7:0 12:8 14:13 15 0 0 1 = reset microcontroller. Reserved. 0 R/O Name Microcontroller debug indicator. Reserved.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 IFP Registers, Page 2 Table 7: Reg # 0 0x00 2 0x02 3 0x03 4 0x04 IFP Registers, Page 2 Bits Default 15:0 0 1 0 0 0 Name JPEG Control Register Start/Enable Encoder: Enable JPEG encoding at the start of next frame. Test SRAM: When set, allows host or microcontroller to take control of the output FIFO buffer and the sixteen 800 x 16 RAMs in the re-order buffer for testing.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 5 0x05 6 0x06 10 0x0A IFP Registers, Page 2 (continued) Bits Default Name 5:0 0 0 0 1 0 JPEG Front End Configuration Register Color component composition: 0—4:2:2 format 1—4:2:0 format JPEG monochrome mode. When this bit is set, the re-order buffer control sends only luma data to the JPEG encoder.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 13 0x0D IFP Registers, Page 2 (continued) Bits Default Name 10:0 0 0x0007 1 1 1 2 1 3 0 4 0 5 0 6 0 7 0 Output Configuration Register Enable spoof frame: When this bit is set, the data captured in the output FIFO is sent out as a spoofed frame, formatted according to information stored in the various spoof registers.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 14 0x0E 15 0x0F 16 0x10 IFP Registers, Page 2 (continued) Bits Default Name 8 0 9 0 10 0 Duplicate FRAME_VALID on LINE_VALID: When this bit is set, the FRAME_VALID waveform is output on LINE_VALID output also; therefore, the two are identical. Enable status insertion: When this bit is set, the JPEG module appends the status byte to the end of the JPEG byte stream.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 17 0x11 18 0x12 29 0x1D 30 0x1E 31 0x1F IFP Registers, Page 2 (continued) Bits Default Name 11:0 0x0258 Spoof Frame Height This register defines the height of the spoof frame used to output data captured in the output FIFO. The height is equal to the number of assertions of LINE_VALID within one assertion of FRAME_VALID.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 32-46 0x200x2E 64 0x40 65 0x41 66 0x42 67 0x43 68 0x44 69 0x45 70 0x46 71 0x47 72 0x48 73 0x49 74 0x4A IFP Registers, Page 2 (continued) Bits Default 15:0 0 Name JPEG Indirect Access Data Register Same as R31:2 when doing two-wire serial interface burst. 15:0 0x0F14 Boundaries of First AF Measurement Window (Top/Left) 7:0 Left window boundary. 15:8 Top window boundary.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 75 0x4B 76 0x4C 77 0x4D 78 0x4E 79 0x4F 80 0x50 81 0x51 82 0x52 83 0x53 84 0x54 IFP Registers, Page 2 (continued) Bits Default Name 15:0 0x028 AF Filter 1 Coefficients 3:0 1 C1. 7:4 0 C2. 11:8 0 C3. 15:12 0 C4. This register specifies coefficient pairs for horizontal filter 1. Coefficient pairs C1 - C4 and center coefficient C0 define the filter kernel.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 85 0x55 86 0x56 87 0x57 88 0x58 89 0x59 90 0x5A 91 0x5B 92 0x5C 93 0x5D 94 0x5E IFP Registers, Page 2 (continued) Bits Default 15:0 0x2080 3:0 1 7:4 1 11:8 1 15:12 1 See R75:2. 15:0 0xC130 3:0 0 4 1 5 1 10:6 0 15:12 0 See R76:2.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 155 0x9B 156 0x9C 157 0x9D 158 0x9E 159 0x9F 160 0xA0 161 0xA1 162 0xA2 163 0xA3 164 0xA4 165 0xA5 IFP Registers, Page 2 (continued) Bits Default Name 15:0 0x252D Second Derivative for Zone 2 Green Color 7:0 d2F/dx2 for zone 2 green color. 15:8 d2F/dy2 for zone 2 green color. Second derivative for green color in zone 2.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 166 0xA6 167 0xA7 168 0xA8 169 0xA9 170 0xAA 171 0xAB 172 0xAC 173 0xAD 174 0xAE 192 0xC0 193 0xC1 194 0xC2 IFP Registers, Page 2 (continued) Bits Default Name 15:0 0x1F27 Second Derivative for Zone 6 Red Color 7:0 d2F/dx2 for zone 6 red color. 15:8 d2F/dy2 for zone 6 red color. Second derivative for green color in zone 6.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 195 0xC3 196 0xC4 197 0xC5 198 0xC6 199 0xC7 200 0xC8 201 0xC9 202 0xCA 203 0xCB 210 0xD2 211 0xD3 212 0xD4 213 0xD5 IFP Registers, Page 2 (continued) Bits Default Name 2:0 6 AE/AF Measurement Enable 0 0 MS bit of the AE measurement window size. 1 1 AE statistic enable. 2 1 AF statistic enable.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor IFP Registers, Page 2 Table 7: Reg # 214 0xD6 215 0xD7 216 0xD8 217 0xD9 240 0xF0 241 0xF1 IFP Registers, Page 2 (continued) Bits Default 10:0 7:0 10:8 13:0 12:0 13 0x030A Name Second Set of Bin Definitions Offset for bin 0, divided by 4 on 10-bit scale. Bin width, 0-4LSB,1-8LSB,2-16LSB,…7-512LSB on a 10-bit scale.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers JPEG Indirect Registers Table 8: JPEG Indirect Registers (See Registers 30 and 31, Page 2) Reg # 1 0x01 3 0x03 4 0x04 5 0x05 6 0x06 7 0x07 8 0x08 9 0x09 128-511 0x080 - 0x1FF 512 - 895 0x200 - 0x37F 1024 - 1407 0x400 - 0x43F Bits Default Name 2:0 0 JPEG Core Register 1 1:0 0 NCol: Number of color components—1.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 8: JPEG Indirect Registers (See Registers 30 and 31, Page 2) (continued) Reg # 1408 - 1471 0x440 - 0x47F 1472 - 1535 0x480 - 0x4BF Bits Default Name 13:0 0 JPEG Zigzag Memory 0 64 x 14 dual-port RAM is accessible to host and microcontroller indirectly for testing purposes.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Monitor Table 10: Driver Variables−Monitor Driver (ID = 0) Offs Name Type Default RW Description 0 2 vmt cmd void* char 58224 0 RW RW 3 5 7 arg1 arg2 msgCount uint uint char 0 0 0 RW RW R 8 12 msg ver long uchar 0 32 R R Reserved Monitor command Setting this variable to 1 causes the monitor to call a firmware function whose address equals mon.arg1.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Sequencer Table 11: Driver Variables−Sequencer Driver (ID = 1) Offs Name Type Default 0 2 vmt mode void* uchar 61547 0x0F 3 cmd uchar 0 4 state uchar 3 5 stepMode uchar 0 6 sharedParams.flashType uchar 0 PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__5_REV5.fm - Rev.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 11: Driver Variables−Sequencer Driver (ID = 1) (continued) Offs Name Type Default 7 sharedParams.aeContBuff uchar 8 8 sharedParams.aeContStep uchar 2 9 sharedParams.aeFastBuff uchar 32 10 sharedParams.aeFastStep uchar 1 11 sharedParams.awbContBuff uchar 8 12 sharedParams.awbContStep uchar 2 13 sharedParams.awbFastBuff uchar 32 14 sharedParams.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 11: Driver Variables−Sequencer Driver (ID = 1) (continued) Offs Name Type Default RW 28 29 30 31 32 sharedParams.LLApCorr1 sharedParams.LLApCorr2 sharedParams.LLApThresh1 sharedParams.LLApThresh2 captureParams.mode uchar uchar uchar uchar uchar 2 0 8 64 0x00 RW RW RW RW RW 33 34 captureParams.numFrames previewParams[0].ae uchar uchar 3 1 RW RW 35 previewParams[0].
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 11: Driver Variables−Sequencer Driver (ID = 1) (continued) Offs Name Type Default 41 previewParams[1].ae uchar 3 42 previewParams[1].fd uchar 2 43 previewParams[1].awb uchar 3 44 previewParams[1].af uchar 0 45 previewParams[1].hg uchar 3 46 previewParams[1].flash uchar 0 47 previewParams[1].skipframe uchar 0x00 48 previewParams[2].
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 11: Driver Variables−Sequencer Driver (ID = 1) (continued) Offs Name Type Default 51 previewParams[2].af uchar 0 52 previewParams[2].hg uchar 1 53 previewParams[2].flash uchar 0 54 previewParams[2].skipframe uchar 0x00 55 previewParams[3].ae uchar 0 56 previewParams[3].fd uchar 0 57 previewParams[3].awb uchar 0 58 previewParams[3].
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 11: Driver Variables−Sequencer Driver (ID = 1) (continued) Offs Name Type Default 61 previewParams[3].
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 14: Driver Variables−Flicker Detection Driver (ID = 4) (continued) Offs Name Type Default RW 15 16 17 19 21 stat minAmplitude R9_step60 R9_step50 Buffer[48] uchar uchar uint uint uchar[48] 5 157 188 R RW RW RW R PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__5_REV5.fm - Rev.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 15: Driver Variables-Auto Focus Driver (ID = 5) (continued) Off Name Type Default RW Description 7 initPos uchar 0 RW 8 numSteps2 uchar 6 RW 9 stepSize uchar 6 RW 10 wakeUpLine uint 448 RW 12 zoneWeights ulong 0xFFFFFF FF RW 16 distanceWeig ht uint 0xFF RW Number (index) of start position, af.positions[af.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Auto Focus Mechanics Table 16: Driver Variables−Auto Focus Mechanics Driver (ID = 6) Default1 RW Offs Name Type 0 vmt void* E0AE 2 type uchar 0 3 4 5 curPos prePos status uchar uchar uchar 0 0 0 6 7 posMin posMax uchar uchar 0 0 8 posMacro uchar 0 PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__5_REV5.fm - Rev.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 16: Driver Variables−Auto Focus Mechanics Driver (ID = 6) (continued) Offs Name Type 9 backlash uchar PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__5_REV5.fm - Rev. B 2/06 EN Default1 RW 0 Description RW Logical size of backlash-compensating step that the AF driver can optionally use in lens positioning after the first scan. If bits [7:6] of af.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 16: Driver Variables−Auto Focus Mechanics Driver (ID = 6) (continued) Default1 RW Offs Name Type 10 custCtrl uchar 0 11 timer.vmt void* E9C6 13 15 timer.startTime timer.stopTime uint uint 0 0 PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__5_REV5.fm - Rev.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 16: Driver Variables−Auto Focus Mechanics Driver (ID = 6) (continued) Default1 RW Offs Name Type 17 timer.hiWordMclkFreq uint 0 19 timer.maxShortDelay uint 0 21 timer.maxLongDelay uint 0 23 timer.maxQuickMove uchar 0 PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__5_REV5.fm - Rev. B 2/06 EN Description RW Master clock frequency in Hz divided by 65536.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 16: Driver Variables−Auto Focus Mechanics Driver (ID = 6) (continued) Default1 RW Offs Name Type 24 timer.config uchar 0 25 si.vmt void* E9CE 27 si.clkMask uint 0 29 si.dataMask uint 0 PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__5_REV5.fm - Rev. B 2/06 EN Description RW Bits [1:0] of this variable determine how afm.timer.maxShortDelay, afm.timer.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 16: Driver Variables−Auto Focus Mechanics Driver (ID = 6) (continued) Default1 RW Offs Name Type 31 si.clkQtrPrd uint 0 33 si.needsAck uchar 0 34 si.slaveAddr uchar 0 35 sm.enabMask uint 0 37 sm.drv0Mask uchar 0 38 sm.drv1Mask uchar 0 39 sm.drv2Mask uchar 0 40 sm.drv3Mask uchar 0 41 sm.drvsQtrPrd uchar 0 43 sm.drvsGenMode uchar 0 44 sm.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers 2. When the AFM driver exchanges information about lens position and motion with the AF driver, it is done in terms of logical position and displacement. Logical position range is from 0 to 255, irrespective of the lens actuator used and the number of distinct physical positions it can put the lens in. 3.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 17: Driver Variables−Mode/Context Driver (ID = 7) (continued) Offs Name Type 129 spec_effects_B uint R0xA4:1 RW 0x6440 131 y_rgb_offset_A uchar R0xBF:1 RW 0 132 y_rgb_offset_B uchar R0xBF:1 RW 0 PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__5_REV5.fm - Rev. B 2/06 EN ASSOC.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 21: Special Function Register List (continued) Name Hex# LineCnt 0x1046/7 ClockCnt 0x1048-B RestartCode 0x104C InfoCode Watchdog 0x104D 0x104E BootMode 0x104F Description Line counter (read-only) Current line number incremented at every line end: —0 at frame start —0x07FF at frame end Address 0x1046 (MSB) must be read first.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Math Co-Processor Operations Table 22: Math Co-Processor 7 6 5 4 Function 0 1 0 1 0 1 1 0 1 1 0 0 0 0 1 1 1 1 1 1 0 0 1 1 0 0 0 1 1 1 X X X X X 0 1 X 0 1 Unsigned MUL Signed MUL Unsigned MAC Signed MAC Unsigned IDIV Signed IDIV Signed IDIV DCC Unsigned FDIV Signed FDIV Signed FDIV DCC PDF: 09005aef8202ec2e/Source: 09005aef8202ebf7 MT9D111__5_REV5.fm - Rev.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 23: GPIO Registers (continued) Register Name Bits Register Content/Function GPIO_WG_T47 7:0 GPIO_WG_T46 7:0 GPIO_WG_N7 7:0 GPIO_WG_N6 7:0 GPIO_WG_CONFIG 3:0 Fifth subperiod of waveform generated at GPIO7 (in 8-bit counter mode) or bits 15:8 of fifth subperiod of waveform output at GPIO6 (in 16-bit counter mode).
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor JPEG Indirect Registers Table 23: GPIO Registers (continued) Register Name Bits Register Content/Function GPIO_NS_STATUS_H 3:0 GPIO_NS_STATUS_L 7:0 When bit b (b = 0,…,3) is set, it signals that some event on pad GPIO(b+8) caused a notification signal. Writing “1” to the bit to clears it. When bit b (b = 0,…,7) is set, it signals that some event on pad GPIO(b) caused a notification signal.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Output Format and Timing Output Format and Timing YUV/RGB Uncompressed Output Uncompressed YUV or RGB data can be output either directly from the output formatting block or via a FIFO buffer with a capacity of 1,600 bytes, enough to hold one half uncompressed line at full resolution. Buffering of data is a way to equalize the data output rate when image decimation is used.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Output Format and Timing Figure 8: Details of Uncompressed YUV/RGB Output Timing PIXCLK tPD Data[7:0] tPD XXX Pxl_0 XXX Pxl_1 XXX Pxl_2 XXX XXX Note: Frame_Valid leads Line_Valid by 6 PIXCLKs. Note: Frame_Valid trails Line_Valid by 6 PIXCLKs.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Output Format and Timing Uncompressed 10-Bit Bypass Output Raw 10-bit Bayer data from the sensor core can be output in bypass mode in two ways: 1. Using 10 data output pads (DOUT0–DOUT9), or 2. Using only 8 pads (DOUT0–DOUT7) and a special 8 + 2 data format, shown in Table 26. The timing of 10-bit or 8-bit data stream output in the bypass mode is qualitatively the same as that depicted in Figure 7.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Output Format and Timing The "continuous" and spoof JPEG output modes differ primarily in how the LINE_VALID output is asserted. In the continuous mode, LINE_VALID is asserted only during output clock cycles containing valid JPEG data. The resulting LINE_VALID signal pattern is nonuniform and highly image dependent, reflecting the inherent nature of JPEG data stream.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Output Format and Timing Color Conversion Formulas Y'Cb'Cr' ITU-R BT.601 A widely known color conversion standard. Note that 16 < Y601 < 235 and 16 < Cb, Cr < 240. 0 < = RGB < = 255. Y601' = Y'*219/256 + 16 Cr' = 0.713 (R' - Y')*224/256 + 128 Cb' = 0.564 (B' - Y')*224/256 + 128 where Y' = 0.299 R' + 0.587 G' + 0.114 B' The reverse formulas to convert YCbCr into RGB, 0 < = RGB < = 255: R' = 1.164(Y601' - 16) + 1.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Sensor Core Sensor Core This section describes the sensor core. The core is based entirely on Micron’s MT9D011 sensor. The SOC firmware controls a key sensor core registers, such as exposure, window size, gains, and contexts. When firmware or MCU are disabled, the sensor core can be programmed directly.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Sensor Core Pixel Array Structure The sensor core pixel array is configured as 1,688 columns by 1,256 rows (shown in Figure 14). The first 52 columns and the first and the last 20 rows of pixels are optically black and are used for the automatic black level adjustment. The last 4 columns are also optically black.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Sensor Core Default Readout Order By convention, the sensor core pixel array is shown with pixel (0,0) in the top right-hand corner (see Figure 15). This reflects the actual layout of the array on the die. When the sensor is imaging, the active surface of the sensor faces the scene as shown in Figure 16.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Sensor Core Raw Data Timing The sensor core output data is synchronized with the PIXCLK output. When LINE_VALID is HIGH, one pixel datum is output on the 10-bit DOUT output every PIXCLK period. By default, the PIXCLK signal runs at the same frequency as the master clock, and its rising edges occur one-half of a master clock period after transitions on LINE_VALID, FRAME_VALID, and DOUT (see Figure 18).
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Sensor Core Registers Table 5, "Sensor Register Description," on page 29 provides a detailed description of the registers. Bit fields that are not identified in the table are read only. Double-Buffered Registers Some sensor settings cannot be changed during frame readout. For example, changing row width R0x03:0 part way through frame readout results in inconsistent LINE_VALID behavior.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Sensor Core Integration for each row of frame (n + 1) has been completed using the old integration time. The earliest time that a row can start integrating using the new integration time is immediately after that row has been read for frame (n + 1). The actual time that rows start integrating using the new integration time is dependent on the new value of the integration time. 3.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Feature Description Feature Description PLL Generated Master Clock The PLL embedded in the sensor core can generate a master clock signal whose frequency is up to 80 MHz (input clock from 6 MHz through 64 MHz). Registers R0x66:0 and R0x67:0 control the frequency of the PLL-generated clock. It is possible to bypass the PLL and use CLKIN as master clock. In order to do so, one must set R0x65:0[15] to 1.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Feature Description Window Control Window Start The row and column start address of the displayed image can be set by R0x01:0 (Row Start) and R0x02:0 (Column Start). Window Size The size of the sensor core image is controlled by R0x03:1 (Row Width) and R0x04:0 (Column Width). The default image size is 1,600 columns and 1,200 rows (UXGA).
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Feature Description Figure 25: 64 Pixels in Normal and Column Skip 16x Readout Modes LINE_VALID Normal readout DOUT0–DOUT9 G0 (9:0) R0 (9:0) G1 (9:0) R1 (9:0) G0 (9:0) R0 (9:0) G16 (9:0) R16 (9:0) G2 (9:0) G31 (9:0) R31 (9:0) LINE_VALID umn skip readout DOUT0–DOUT9 Digital Zoom Digital zoom is not used in SOC. Binning The sensor core supports 2 x 2 binning of 4 pixels of the same color.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Feature Description • Start address must be divisible by four (row and column). • Window size must be divisible by four in both directions, after dividing by zoom factor and skip factor (because they both reduce the effective window size from the sensor’s point of view). Example: Default row size = 1,200.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Feature Description Integration Time Integration time is controlled by R0x09:0 (shutter width in multiples of the row time) and R0x0C:0 (shutter delay, in PIXCLK_PERIOD/2). R0x0C:0 is used to control sub-row integration times and only has a visible effect for small values of R0x09:0.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Feature Description Flash STROBE The sensor core supports both Xenon and LED flash through FLASH output. The timing of FLASH with the default settings is shown in Figure 26, Figure 27, and Figure 28. R0x23:0 allows the timing of the flash to be changed.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Feature Description Global Reset The sensor core provides a global reset mode in which the pixel integration time is controlled by an external mechanical shutter. The sensor can then operate on a lower clock frequency, reducing the bandwidth on the interface between the sensor and the host processor without losing image quality. The basic operation is as follows: 1.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Feature Description Offset Voltage: VOFFSET The offset voltage provides a constant offset to the ADC to fully utilize the ADC input dynamic range. The offset voltages for green1, blue, red, and green2 pixels are manually set by registers R0x61:0, R0x62:0, R0x63:0, and R0x64:0, respectively. The offset voltages also can be automatically set by the black level calibration loop.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Feature Description used to compensate at the input. The ADC is designed to operate with differential inputs. Since AIN1–AIN3 are used as single-ended inputs to the ADC, it is recommended to average values from several samples (if possible, a whole frame) to cancel out noise.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware Firmware Firmware implements all automatic functionality of the camera, including auto exposure, white balance, auto focus, flicker detection and so on. The firmware consists of drivers, generally one driver per each major control function. The firmware runs on a 6811-compatible microcontroller with a mathematical co-processor. 32K of metal maskprogrammable PROM is available for non-volatile code.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware 2. Construct new VMT a. use pointers to the new functions b. use old pointers to call old methods 3. New methods can call inherited functions using old VMT pointers 4. Point driver data structure VMT pointer to the new VMT The main routine continues firmware initialization by calling driver initialization functions.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware GPIO and Waveform Generator on Local Bus For better performance GPIO and waveform generator are connected to the local 6811 SFR bus. High-Precision Timer A 32-bit master clock (80 MHz) counter for code profiling or time measurements. Sleep and Wakeup Programming To sleep and wake up on a certain line, program the following: 1. Set line number to wake up at SFR 0x1042. a.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware High-Precision Timer SFR 0x1048 is a high-precision timer is available for use in applications, and profiling code during development. It is a 32-bit counter incremented every master clock, except when in standby. To profile, read and store the timer before executing a routine. After the routine exits, read the timer again and subtract from the initial value.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware Figure 32: Sequencer Driver Do Standby Refresh IFP Run Standby Do Preview Preview Do Capture Lock Enter Preview Lock Leave Preview Refresh Sensor Do Preview Init Ch.Mode To Preview Ch.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware a. Set auto exposure, white balance and auto focus speed 3. Execute sensor REFRESH command 4. Run in preview until shutter button is depressed a. If the shutter button is depressed halfway, execute the lock program i. Configure preview state to disable necessary functions to be locked, e.g., auto exposure, white balance, and auto focus ii.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware To continue with capture after CM_LOCK 1. Disable all automatic functions in PreviewLeave. Set flash mode to MODE_FLASH_LOCKED 2. Disable CaptureEnter state 3. Perform CM_CAPTURE. That restores flash state in PreviewLeave and make a snapshot To perform CM_CAPTURE without CM_LOCK 1. Set PreviewLeave flash configuration to MODE_FLASH_AUTO. Set the state's AE and WB to fast settling. 2.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware Firmware Auto Exposure Driver The AE driver works to achieve desirable exposure by adjusting sensor core’s integration time, analog, and digital gains. The driver can be configured with respect to desired AE speed, maximum and minimum frame rate, the range of gains, brightness, backlight compensation, and so on. AE driver typically runs in one of these modes.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware For example, cool-white office illumination tends to have a position near 64. Variables awb.CCMpositionMin, awb.CCMpositionMax, awb.GainMin, awb.GainMax specify CCM position and digital RGB gain limits. When changing these settings, issue a REFRESH command to put new values into effect. AWB speed is controlled by awb.JumpDivisor and awb.GainBufferSpeed.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware array is outside the frame, the value given to af.wakeUpLine by AF_SetSize is invalid (greater than frame height) and must be changed to something less than the frame height—otherwise AF does not work.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware To upload a custom gamma table, upload the values to the appropriate mode driver locations (see Table 18, "Driver Variables-JPEG Driver (ID = 9)," on page 97), and select the gamma table type to be three (user defined) for the particular mode. If a contrast level is selected, it is applied to the user uploaded gamma table. The driver contains settings for raw and output image size and pan for each mode.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Firmware • fd.search_f1/2_50 and fl.search_fl/2_60 are ranges of frequencies to look for: fd.search_f1_50=0.2*fd.R9_step60-1; fd.search_f2_50=0.2*fd.R9_step60+1; fd.search_f1_60=0.2*fd.R9_step50-1; fd.search_f2_60=0.2*fd.R9_step50+1 • fl.stat_min and fl.stat_max are detection thresholds; for flicker to be detected fl.stat_max continuous frames must contain the searched frequency at least fl.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage Since the quantization memory stores 3 sets (luma and chroma) of quantization tables, the one that is used for the current frame JPEG encoding is indicated in bit 7:6 of jpeg.config (quantization table ID). Bit 5 of jpeg.config determines who is responsible for setting the quantization table ID.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage Power-Up There are no specific requirements to the order in which different supplies are turned on. Once the last supply is stable within the valid ranges specified below, follow the hard reset sequence to complete the power-up sequence. In order to minimize leakage current, all the power supplies should be turned on at the same time. Analog Voltage 2.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage Figure 33: Power On/Off Sequence POWER DOWN POWER UP VDD, VDDQ, VAA, VAAPIX RESET (>1μs) RESET# 24-CLKIN CLKIN SCLK/SDATA (SHIP) INACTIVE INACTIVE STANDBY Notes: 1. For a safe RESET to occur, CLKIN should be running during RESET with STANDBY LOW, as shown in the sequence above. 2.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage Configure Pad Slew Program the desired slew rate for DOUT, PIXCLK, FRAME_VALID, and LINE_VALID at the variables, mode.fifo_conf1/2_A/B. Program R10:1 with desired GPIO slew rate and slew rate for two-wire serial interface SDATA and SCLK. Configure Preview Mode The default preview image size is 800 x 600, running at up to 30 fps at 80 MHz internal clock.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage 2. Preventing additional leakage current during standby a. Set R10:1[7]=1 to prevent elevated standby current. It controls the bidirectional pads DOUT, LINE_VALID, FRAME_VALID, PIXCLK, and GPIO. b. If the outputs are allowed to be left in an unknown state while in standby, the current can increase.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage Figure 34: Hard Standby Sequence Wait for Power Up seq.state=3, Sequence then call Completed seq.cmd=3 Wait for seq.state=9, then bypass PLL and set all the required registers/ variables described Assert STDBY CLKIN off CLKIN on Reconfig output Deand GPIO pads if assert necessary, then STDBY call seq.cmd=1 When seq.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage GPIO outputs can also be tri-stated. See “General Purpose I/O” on page 162 description for details. Contrast and Gamma Settings The MT9D111 IFP includes a block for gamma and contrast correction. A custom gamma/contrast correction table may be uploaded, or pre-set gamma and contrast settings may be selected.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage transitions. In addition, the slope of the "S" curve is zero at the top (white) and bottom (black) points. The slope of the linear region determines how much contrast is applied; more contrast corresponds to a higher, midtone linear slope. Figure 36: Contrast “S” Curve The contrast values are shown in Table 40.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage Bright Figure 37: Tonal Mapping Output Output y2 Mid y2 y1 Dark Input x1 Dark y1 Input x1 x2 Mid Dark Bright x2 Mid Bright The contrast settings on the MT9D111 are implemented by applying an S-Curve function on to the data points of the gamma curve.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage Auto Exposure Two types of auto exposure are available—preview and evaluative. Preview In preview AE, the driver calculates image brightness based on average luma values received from 16 programmable equal-size rectangular windows forming a 4 x 4 grid. In preview mode, 16 windows are combined in 2 segments: central and peripheral. Central segment includes four central windows.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage giving preference to increase in gain. ae.maxGain23 specifies maximum allowed gain in this situation. ae.VirtGain indicates current green channel gain. • In darker situations, the gain achieves ae.maxGain23 and the integration time is allowed to increase again up to ae.maxIndex. • In yet darker situations, once the integration time achieves ae.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage Figure 40: Lens Correction Zones X Y 5 0 X Y 4 1 X Y 3 2 CX CY X X Y 2 Array Center 3 X Y 1 4 X Y 0 5 Lens Correction Procedure The goal of the lens shading correction is to achieve a constant sensitivity across the entire image area after the correction is applied.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage and are defined independently for each dimension. These can be expressed further as φ ( x, x 2 )= a i x 2 + b i x + c i ϕ ( y, y 2 )= d i y 2 + e i y + f i (EQ 5) (EQ 6) In order to implement the function F (x, y) for each zone the MT9D111 provides a set of registers that allow flexible definition of the function F (x, y).
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Start-Up and Usage 4. Clip the result R G B CLIP C 11 C 12 C 13 C 21 C 22 C 23 C 31 C 32 C 33 Rraw*GR - D Graw *GG- D Braw *GB - D MCU controls both CCM and D; see "Auto White Balance Driver" on page 143 and "Histogram Driver" on page 146. Decimator In order to fit image size to customer needs, the image size of the SOC can be scaled down. The decimator can reduce image to arbitrary size using filtering.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O General Purpose I/O Introduction Actuators used to move lenses in AF cameras can be classified into several categories that differ significantly in their requirements for driving signals. These requirements vary also from one device to another within each category.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O GPIO3, the user only has to write 8 to the address 0x1073 (also known as register GPIO_OUTPUT_TOGGLE_L). To do the same by writing to the register GPIO_DATA_L, the user must know in advance the state of its third bit and all other bits corresponding to output pads.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O Figure 41: Examples of GPIO-Generated Waveforms T W0 T T 00 S 30 T 20 40 00 T T 11 W1 T 10 T S01 01 31 T T 41 21 T T 22 02 W2 S02 W3 S03 T 12 T 03 T 13 Of the four waveforms depicted in Figure 41, the first two are examples of the most complex waveforms that the GPIO can generate.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O In any case, the Np values occupy up to 8 registers (GPIO_WG_N0 through GPIO_WG_N7). Writing an invalid Np = 0 to any of these registers is interpreted as setting this particular Np to infinity. The Tip values are fully encoded in 42 registers named GPIO_WG_T*, GPIO_WG_CLKDIV, and GPIO_WG_CLKDIV_SEL.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O One of the 10-bit ADCs in the MT9D111 sensor core is available to sample external voltage signals (0.1 to 1.0V) during horizontal blanking periods, when it does not digitize sensor signal. The external signals that need to be sampled must be connected to AIN1, AIN2, and/or AIN3 input pads. By default, these are test pads that give access to different points in the sensor analog signal chain.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O sums per frame. As soon as these sums or raw sharpness scores are computed, they are put in dedicated IFP registers, as are Y averages from all the AF windows.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O a direct jump from last position tried in a scan to best focus position. Number of steps in each scan, lens positions stepped through during the first scan, and step size in the second scan are all individually programmable. The first normalized score from each AF window, acquired at the start position, is stored as both the worst (minimum) and best (maximum) score for that window.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O calculates lens positions to be tried in the second scan from its 2 user-set parameters and the position found best in the first scan. The calculation takes into account where that position is relative to the limits of the lens motion range and how it would be reached if the second scan were not enabled.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O Figure 43: Scene with Two Potential Focus Targets at Different Distances from Camera IMAGE SENSOR LENS OPTICAL AXIS LENS POS. # : 0 1 2 3 4 5 6 7 8 9 BUSINESS CARD CAT PICTURE Figure 43 shows a simple scene with two potential focus targets: a business card in front and a picture of a cat far in the background. Distances in the diagram are not to scale.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O Figure 44: Dependence of Luminance-Normalized Local Sharpness Scores on Lens Position 120 W12 W13 W32 W42 W43 Normalized Sharpness Score 100 80 60 40 20 0 0 1 2 3 4 5 6 7 8 9 Lens Position Number Figure 44 shows luminance-normalized sharpness scores from AF windows W12, W13, W32, W42, and W43 in Figure 43.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O Figure 45 shows an example of position weight histogram created by AF driver to select best lens position. This histogram corresponds to the situation depicted in Figure 43 and Figure 44.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor General Purpose I/O filters are user-programmable within the following constraints: each can have 8 or 9 integer coefficients with values from -15 to 15, can be symmetric or antisymmetric, and can be multiplied by a power-of-2 weight factor ranging from 1/512 to 32. By default, both are programmed to detect sharp edges, but the first filter is more high-pass than the second.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Spectral Characteristics Spectral Characteristics Figure 48: Typical Spectral Characteristics Quantum Efficiency vs. Wavelength 40 Blue Green Re d 35 Quantum Efficiency (%) 30 25 20 15 10 5 0 350 400 450 500 550 600 650 700 750 Wavelength (nm) Die Outline Figure 49: Optical Center Offset 8199.35μm (bare die) PLL 7845.05μm (bare die) First Clear Pixel (Col 52, Row 20) Optical Center (167.84μm, 2.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Electrical Specifications Electrical Specifications Recommended die operating temperature range is from -20° to +55°C. The sensor image quality may degrade above +55°C.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Electrical Specifications Table 44: Absolute Maximum Ratings Symbol VDD VDDQ VDDPLL VAA VAAPIX VIN VOUT TOP TSTG1 Note: Parameter MIN Digital power I/O power PLL power Analog power (2.8V) Pixel array power DC input voltage DC output voltage Operation temperature Storage temperature -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -30 -40 MAX Unit 2.4 4.0 4.0 4.0 4.0 VDDQ+0.3 VDDQ+0.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Packaging Packaging Figure 51: 64-Ball iCSP Package Mechanical Drawing 0.950 ±0.075 1.35 ±0.10 B SEATING PLANE A 0.10 A 0.40 0.175 (FOR REFERENCE ONLY) 0.575 ±0.0501 7.00 0.375 ±0.0501 7.20 CTR 1.00 TYP 64X Ø0.55 DIMENSIONS APPLY TO SOLDER BALLS POST REFLOW. THE PRE-REFLOW DIAMETER IS 0.50. BALL A1 BALL A1 ID BALL A8 CL FIRST CLEAR PIXEL 4.498 ±0.075 4.50 ±0.05 7.00 0.168 (FOR REFERENCE ONLY) 4.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Appendix A: Two-Wire Serial Register Interface Appendix A: Two-Wire Serial Register Interface This section describes the two-wire serial interface bus that can be used in any functional sensor mode. The two-wire serial interface bus enables R/W access to control and status registers within the sensor core. The interface protocol uses a master/slave model in which a master controls one or more slave devices.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Appendix A: Two-Wire Serial Register Interface Bus Idle State The bus is idle when both the data and clock lines are high. Control of the bus is initiated with a start bit, and the bus is released with a stop bit. Only the master can generate start and stop bits. Start Bit The start bit is defined as a HIGH-to-LOW data line transition while the clock line is HIGH.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Appendix A: Two-Wire Serial Register Interface Acknowledge Bit The master generates the acknowledge clock pulse. The transmitter (which is the master when writing, or the slave when reading) releases the data line, and the receiver indicates an acknowledge bit by pulling the data line low during the acknowledge clock pulse.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Appendix A: Two-Wire Serial Register Interface 16-Bit Read Sequence A typical read sequence is shown in Figure 53. First the master writes the register address, as in a write sequence. Then a start bit and the read address specify that a read is about to happen from the register. The master clocks out the register data, eight bits at a time. The master sends an acknowledge bit after each 8-bit transfer.
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Micron Confidential and Proprietary MT9D111 - 1/3.2-Inch 2-Megapixel SOC Digital Image Sensor Revision History Revision History Rev. B, Production ...........................................................................................................................................................